VHDL-FPGA-Verilog List Page 845

VHDL-FPGA-Verilog list

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DMA Downloaded：0: DMA mode A/D sampling control circuit design, output data
Date : 2025-07-26 Size : 208kb User : 张琳
FRENQ Downloaded：0: 4 decimal frequency of the design, through the use of 1Hz clock to treat the measured clock frequency measurement
Date : 2025-07-26 Size : 54kb User : 张琳
LDPC_DVB-T2 Downloaded：0: LDPC encoding code in 1/2code rate for DVB-T2
Date : 2025-07-26 Size : 3kb User : 李哲范
uart_async Downloaded：0: RS232 CODE
Date : 2025-07-26 Size : 2kb User : 李飞
fdiv7 Downloaded：0: Program realizes frequency devision-by-7 of the input clock signal , the program uses two counters, one triggered by the rising edge of the input clock, and the other triggered by the falling edge of the clock.Then I ope
Date : 2025-07-26 Size : 31kb User : 沈湛
AD0809 Downloaded：0: ADC0809 is 8-bit AD converter, In the chip, there are 8-channel analog switches that can control one of eight analog quantity into converter, the time of a conversion is about 100us.
Date : 2025-07-26 Size : 30kb User : 沈湛
add4_bcd Downloaded：0: Procedures described BCD adder, using the rules of decimal.
Date : 2025-07-26 Size : 28kb User : 沈湛
bpltonrz3412_12M Downloaded：0: The above source code for converting bi phase L to Binary, at the 6144 bit rate
Date : 2025-07-26 Size : 338kb User : Naveen
pdiv Downloaded：0: The function of this divider is when different input data is available at the input,there is different divider ratio for clk.
Date : 2025-07-26 Size : 29kb User : 沈湛
fifo Downloaded：0: Designing a synchronous dual-port 8* 128 fifo using VHDL.
Date : 2025-07-26 Size : 35kb User : 沈湛
VHDL-description- Downloaded：0: 2choose 1 multichannel selector VHDL description of four kinds of methods. TXT To realize the same function circuit, there is the description of the different methods On the other hand, for a given circuit function, the
Date : 2025-07-26 Size : 1kb User : happy
uart Downloaded：0: UART base on rs232 verilog files
Date : 2025-07-26 Size : 587kb User : 方禹

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