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VHDL-FPGA-Verilog list
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Elevator_controller
Downloaded:0
Digital clock using Quartus9.1 platform, using Verilog language, to share to everyone
Date
: 2025-07-17
Size
: 1.75mb
User
:
huyunchuan
new_uart
Downloaded:0
Debugger serial, serial debugging assistant available to detect the serial data transceiver
Date
: 2025-07-17
Size
: 1.82mb
User
:
ljp
Verilog_digital_clock
Downloaded:0
Digital clock using Quartus9.1 platform, using Verilog language, to share to everyone
Date
: 2025-07-17
Size
: 1.92mb
User
:
huyunchuan
AM
Downloaded:0
Experiments using matlab software direct digital frequency synthesis
Date
: 2025-07-17
Size
: 10.03mb
User
:
陈杨
adc12d1000_rfrb
Downloaded:0
ADC12D800 source code
Date
: 2025-07-17
Size
: 6kb
User
:
denkins2020
rgstr
Downloaded:0
ADC12D800 source code
Date
: 2025-07-17
Size
: 1kb
User
:
denkins2020
dcm100
Downloaded:0
ADC12D800 source code
Date
: 2025-07-17
Size
: 3kb
User
:
denkins2020
an489
Downloaded:0
Routines and documentation for MAXII series CPLD used in UMF
Date
: 2025-07-17
Size
: 611kb
User
:
1zs
tdc
Downloaded:1
TDC linear stretch of verilog, includes gate-level netlist
Date
: 2025-07-17
Size
: 4kb
User
:
lijinpeng
fir16.v
Downloaded:0
Verilog 16-order FIR filter
Date
: 2025-07-17
Size
: 1kb
User
:
lijinpeng
fir48
Downloaded:0
48-order FIR filter verilog, including test paper
Date
: 2025-07-17
Size
: 2kb
User
:
lijinpeng
simple
Downloaded:0
A simple 8-bit processor and the complete design process verilog code, suitable for beginners ic design for human use, and contains my personal writing instruction execution, for reference
Date
: 2025-07-17
Size
: 80kb
User
:
lijinpeng
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