VHDL-FPGA-Verilog List Page 753

VHDL-FPGA-Verilog list

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disp Downloaded：0: Digital scanner, simply fed 32BIT data, the module can control eight corresponding digital display.
Date : 2025-07-01 Size : 1kb User : 刘洋
uC_CISC_16_Design Downloaded：0: Verilog Based CISC Processor.....Availble for Purchase...rahulshandilya@outlook.com
Date : 2025-07-01 Size : 3kb User : Rahul
INS_Reg_Dec---Copy Downloaded：0: Instruction REgister
Date : 2025-07-01 Size : 1kb User : Rahul
CISC-Processor-MOdule-Verilog Downloaded：0: Cisc Processor For Se
Date : 2025-07-01 Size : 5kb User : Rahul
Loadshedding Downloaded：0: This is a project using FPGA for implementing the preferential loadshedding schemes.
Date : 2025-07-01 Size : 3kb User : Md. Shariful Islam
cfq8 Downloaded：0: Based on Quartus simulation software of eight binary multiplier, verilog language used in eight binary multiplication.
Date : 2025-07-01 Size : 1kb User : 刘杨
FREQUENCY_COUNTER_DISPLY_BLOCK Downloaded：0: Four digital frequency meter
Date : 2025-07-01 Size : 699kb User : tornp
aurora_1_example Downloaded：0: serial communication using aurora core
Date : 2025-07-01 Size : 4kb User : phani
Vendor Downloaded：0: This a vending machine which is written by verilog on Basys2 board.
Date : 2025-07-01 Size : 1.63mb User : 郭少佳
ex2_key Downloaded：0: VHDL-key debounce experimental procedures used EMP240 processor, we hope to be useful
Date : 2025-07-01 Size : 307kb User : 李希光
switch_power_identify Downloaded：0: ON划词翻译ON实时翻译 FPGA intelligent digital voltage, this FPGA code, based on A3PN250, the software for the libro. Acquisition of voltage and current parameters, PID controller, serial communication through configuration, can
Date : 2025-07-01 Size : 5.12mb User : 方关明
PCM30-Verilog-source-code Downloaded：0: Use Verilog design PCM30 base frame synchronization circuit
Date : 2025-07-01 Size : 1kb User : Simon

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