VHDL-FPGA-Verilog List Page 66

VHDL-FPGA-Verilog list

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09.数字电压表 Downloaded：0: In this experiment, we transform the resistance of potentiometer into analogue value and read it to the screen, which is an example application that we must master after we finish the experiment function we need.
Date : 2025-05-15 Size : 1.01mb User : acba
归档 Downloaded：0: DDR3 using teaching
Date : 2025-05-15 Size : 24.09mb User : tonephy
example1-led_w_dir Downloaded：0: LED Control of pipelining sequence operation and frequency divider specification
Date : 2025-05-15 Size : 196kb User : 一夜长安
McBSP_8bit_Asyn Downloaded：1: Mcbsp communication source code based on FPGA,Through the test of the project.
Date : 2025-05-15 Size : 1kb User : Trigger_Z
test_28 Downloaded：0: The system clock selects the clock of the clock module of the 1Hz, the yellow light scintillation clock is required for 1Hz, the red light 15s, the yellow light 5S, the green light 15s
Date : 2025-05-15 Size : 1019kb User : xwg1234
STM32与FPGA通信 Downloaded：0: Communication between STM32 and FPGA, the protocol is SPI, two-way communication (two-way communication needs to be taken as an example, only FPGA to STM32)
Date : 2025-05-15 Size : 3.66mb User : hehengfu
squareLoop Downloaded：0: FPGA implementation of synchronous carrier extraction using square loop method
Date : 2025-05-15 Size : 1.77mb User : shusheng_
quartus和modelsim中使用mif和hex文件1 Downloaded：0: fpga modelsim mif hex
Date : 2025-05-15 Size : 51kb User : 打酱油啊
v Downloaded：0: statistical signal processing,verilog
Date : 2025-05-15 Size : 82kb User : bhshn
src Downloaded：0: xilinx v6 rapidio data transmission protocol Practical project application engineering code
Date : 2025-05-15 Size : 8.67mb User : 南华真人
MaxMovie 老干妈 Downloaded：0: The demo demo is clearer and clearer and faster and simpler.
Date : 2025-05-15 Size : 13.43mb User : 王佳成
alu Downloaded：0: Code to synthesize Arithmetic Logic Unit
Date : 2025-05-15 Size : 114kb User : Immanuel

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