VHDL-FPGA-Verilog List Page 63

VHDL-FPGA-Verilog list

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Vivado_2037 Downloaded：0: vivado 2015.4 lisence
Date : 2025-05-14 Size : 2kb User : ji100
seg_1 Downloaded：0: Time module, digital tube display, format: time, minute, second
Date : 2025-05-14 Size : 5.6mb User : 1Q84
oc8051 Downloaded：0: Source code of oc8051
Date : 2025-05-14 Size : 651kb User : Abulei
DDS30k Downloaded：0: Verilog was used to generate sine and triangle wave signals based on direct digital frequency synthesis in quartus development platform.
Date : 2025-05-14 Size : 5.93mb User : gmj3841168
try4 Downloaded：0: Using MIF files to generate ROM/RAM with example programs and test files
Date : 2025-05-14 Size : 3.11mb User : imdouniwan
SDRAM Downloaded：0: SDRAM programming code, FPGA design code.
Date : 2025-05-14 Size : 9.29mb User : FPGA110
F429编码器例程 Downloaded：0: The accurate output of the encoder is developed using the F429 core plate of the positive atom.
Date : 2025-05-14 Size : 10mb User : 西海的鱼
BMD_design_gen2_x4_Chipscope Downloaded：0: This file is Xilinx's PCIE demonstration document that validates the basic functions of the implementation of PCIE
Date : 2025-05-14 Size : 8.92mb User : chunjingshui
JTD SJ Downloaded：0: Using 16 bit MCU, LCD module, small lamp module, timer module, serial communication module. Design a traffic light.
Date : 2025-05-14 Size : 415kb User : 穆徽月依
Description Downloaded：0: Altera software examples Cyclone IV
Date : 2025-05-14 Size : 2.95mb User : TreyWilliams
KEY2_TEST Downloaded：0: Altera firmware examples for Cyclone IV
Date : 2025-05-14 Size : 2.81mb User : TreyWilliams
KEY3_TEST Downloaded：0: Atera Cyclone IV examples for quartus
Date : 2025-05-14 Size : 77kb User : TreyWilliams

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