VHDL-FPGA-Verilog List Page 545

VHDL-FPGA-Verilog list

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led2 Downloaded：0: Niosii+qsya SOC simple light water lamp program for beginners,.
Date : 2025-06-21 Size : 11.94mb User : hcl
array-led-display-chinese-characters Downloaded：0: array led display chinese characters
Date : 2025-06-21 Size : 281kb User : wangjiaran
LCD12864-display-picture Downloaded：0: LCD12864 display picture.rar
Date : 2025-06-21 Size : 516kb User : wangjiaran
verilog-HDL Downloaded：0: Buzzer FPGA-based design
Date : 2025-06-21 Size : 3.73mb User : Qiu,Kitty
acservoceshiyi Downloaded：0: AC servo tester program to test the performance of AC servo
Date : 2025-06-21 Size : 4kb User : sunnn
m_xulie Downloaded：0: It is written verilogHDL m sequence generator, easy to use, the code is very easy to read
Date : 2025-06-21 Size : 318kb User : Bob
AD_TLC549 Downloaded：0: It is written in AD549 verilogHDL the FPGA driver code, applicable to the general serial AD chip
Date : 2025-06-21 Size : 9.08mb User : Bob
DA_TLC5620 Downloaded：0: This a FPGA-based verilog write driver code TLC5620 serial DA, the latter slightly modified the trial in an ordinary serial DA driver
Date : 2025-06-21 Size : 11.15mb User : Bob
xor4b Downloaded：0: 4 bits xor gate finished with VHDL language， specifically for greenhands and bachelors who just begin with quartus
Date : 2025-06-21 Size : 1kb User : tomassam
aaa Downloaded：0: 24 States adding type counter， every rising-edge signal increases the counter, and making sequence 0-1-2-...-22-23 cycled.
Date : 2025-06-21 Size : 1kb User : tomassam
esjz Downloaded：0: 60-24 simulator of a clock, 60 is for minutes, starts 0 increased by 1,and cycle period is 60 once a cycle is finished, the 24 adding-type counter will increase by1 and cycle with a period of 24.
Date : 2025-06-21 Size : 1kb User : tomassam
CPLD_PCIE20140613 Downloaded：0: The CPLD Program for PLX8311 the PCIE local bus state program, can be achieved based PCIE X1 data communication, in the actual project application by
Date : 2025-06-21 Size : 244kb User : 不再犹豫

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