VHDL-FPGA-Verilog List Page 4272

VHDL-FPGA-Verilog list

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FFT变换的IP核的源代码 VHDL~ Downloaded：0: FFT IP core of the source code for VHDL ~
Date : 2025-08-12 Size : 31kb User : 陈旭
vgaout Downloaded：0: VHDL by VGA interface standards, digital image signal conversion into a standard VGA format. Suitable for the pilot study
Date : 2025-08-12 Size : 7kb User : 余飞
zlgz Downloaded：0: simple electronic toys perception module programming, through external input signal a change in the internal signal. In order to change the state of toys
Date : 2025-08-12 Size : 1kb User : 星麒麟
Alu1232 Downloaded：0: VHDL development of the counter. Source code is not complicated, should be able to understand. The most important Note : Timing is the issue
Date : 2025-08-12 Size : 1kb User : 张念华
微处理器的设计与实现 Downloaded：0: a simple microprocessor to achieve, for several common to the operation of the computer for those familiar with the working principle helpful, and with the detailed design reports and design ideas. The word is the final
Date : 2025-08-12 Size : 438kb User : 郭慧勤
数字频率计实验报告 Downloaded：1: curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F/F 2% external clock system : 1024Hz Wav
Date : 2025-08-12 Size : 141kb User : 兰
seller2 Downloaded：0: program vending machine at the core function, with three kinds of commodity prices, the number of choice, having to function.
Date : 2025-08-12 Size : 2kb User : 陆文娟
引爆器 Downloaded：0: digit passwords detonated's input Description : one at the start and enter the password before the wait state, according to First READY button, now ready to be imported into digital code; Two, when detonated after the in
Date : 2025-08-12 Size : 24kb User : 刘卫
电子钟clock Downloaded：0: use VHDL to achieve an electronic clock, the time can be set aside. Hours, minutes and seconds. Experiments can be downloaded to the box to run test.
Date : 2025-08-12 Size : 345kb User : 刘卫
vhdl Downloaded：0: RS232 data transmitter, suitable for beginners VHDL reference
Date : 2025-08-12 Size : 4kb User : 波波
vhdl-多功能电子表 Downloaded：0: This is a series with VHDL multifunctional electronic stopwatch, can be recorded by several people, and that they could run in the second examined the records. . [Original]
Date : 2025-08-12 Size : 5kb User : 王继东
dds正弦发生器代码 Downloaded：0: described dds direct digital frequency synthesis of the basic tenets addition to the use of VHDL prepared dds source used to produce sine, and ISE development platform for simulation and verification MATLAB sine wave out
Date : 2025-08-12 Size : 480kb User : czy

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