VHDL-FPGA-Verilog List Page 4244

VHDL-FPGA-Verilog list

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Modelsim中文教程 Downloaded：0: Modelsim Chinese guide, a three stresses Modelsim information, the rookie is a very good reference!
Date : 2025-05-15 Size : 948kb User : 温暖感
出租车计价器VHDL程序与仿真 Downloaded：1: Taximeter procedures and VHDL simulation, VHDL source code, to this regard, the design of the comrades who have a good reference value! !
Date : 2025-05-15 Size : 84kb User : 温暖感
自动售货机VHDL程序与仿真 Downloaded：0: vending machines procedures and VHDL simulation source code, the high reference value!
Date : 2025-05-15 Size : 140kb User : 温暖感
MPSK调制与解调VHDL程序与仿真 Downloaded：0: MPSK modulation and demodulation process and VHDL simulation, high reference value! ! VHDL code!
Date : 2025-05-15 Size : 78kb User : 温暖感
脉冲记时CPLD Downloaded：0: Date : 2025-05-15 Size : 630kb User : 高颖峰
一个波形发生器和sine波形发生器 Downloaded：0: This is a typical wave generator Shogen procedures and an arbitrary waveform generator procedures, Members can take a learning portal for VHDL or helpful
Date : 2025-05-15 Size : 3kb User : 张云鹏
moore state_machine Downloaded：0: This is a typical state machine moore procedure reference for beginners
Date : 2025-05-15 Size : 1kb User : 张云鹏
muxplusii --vhdl 经典程序 Downloaded：0: prepared using VHDL digital clock, Variable width pulse generator, etc.
Date : 2025-05-15 Size : 8kb User : vhdp
占空比1：1的通用分频模块 Downloaded：0: use VHDL to achieve the common 1:1-frequency module, a very practical and you are welcome to download
Date : 2025-05-15 Size : 1kb User : kiki
USB 2.0 IP Core Downloaded：0: USB20 IP CORE, can be directly used in SOPC, automatically complete the enumeration. only a modification of enumerated parameters can be!
Date : 2025-05-15 Size : 177kb User : 林风
fifo程序 Downloaded：0: using Verilog language in which they simply realize fifo function!
Date : 2025-05-15 Size : 1kb User : 刘涛
k5 Downloaded：0: experimental procedure for FPGA serial communications and computer research
Date : 2025-05-15 Size : 1.04mb User : 仇海亮

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