VHDL-FPGA-Verilog List Page 4223

VHDL-FPGA-Verilog list

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vhdlprogram Downloaded：0: with complex programmable logic devices (CPLD) with a digital clock control system
Date : 2025-05-16 Size : 5kb User : 王永
FIR_1 Downloaded：0: FIR filter Verilog, has implemented six lines of program design.
Date : 2025-05-16 Size : 1kb User : 李甫
TI6713DSKVHDL Downloaded：0: TI6713 floating-point DSP DSK VHDL. More comprehensive. Compiler can run.
Date : 2025-05-16 Size : 31kb User : 丁德锋
n_dc_motor Downloaded：0: VHDL achieved DC Motor Controller General of different procedures they simply/cpld. may need to amend some source code.
Date : 2025-05-16 Size : 2kb User : 刘挺
source_verilog Downloaded：0: Verilog realized Adder (8) applies to beginners blends
Date : 2025-05-16 Size : 156kb User : 高浪
sdramcore Downloaded：0: SDRAM control of the kernel, the top series, has been tuned, no errors
Date : 2025-05-16 Size : 19kb User : 韩
air_controller Downloaded：0: this as an air-conditioning controller, is to use the FPGA to realize that he can complete the indoor temperature adjustment.
Date : 2025-05-16 Size : 107kb User : kyhh
MAX_II_board_schematics Downloaded：0: Altera's MAX II development board schematics
Date : 2025-05-16 Size : 236kb User : 周宇
CPLD_CCD Downloaded：0: based CPLD CCD Acquisition System Design FOSS
Date : 2025-05-16 Size : 65kb User : 周宇
vhdl_examples Downloaded：0: VHDL language routines magazines, large variety of code for VHDL helpful learning
Date : 2025-05-16 Size : 165kb User : 周宇
veriloghdl135 Downloaded：0: VHDL learning materials, curricula, progress together, share!
Date : 2025-05-16 Size : 171kb User : huang
color_space_converter Downloaded：1: verlog programming color space conversion is testing documents
Date : 2025-05-16 Size : 8kb User : 周信均

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