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MaxPlusII used to write a small clock procedures, as well as reference for beginners. Ha ha. Note///moderator, development environment there's no MaxPlusII.
Date : 2025-05-17 Size : 793kb User : Backy

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compiled the debug/release directory to reduce the size of compressed
Date : 2025-05-17 Size : 492kb User : lsm

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RS232 communications VHDL source code, Segments 2 environment through implementation
Date : 2025-05-17 Size : 158kb User : lq

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This is opencores fifo under the code, including asynchronous and synchronous. There testbench written in the hope that useful for all.
Date : 2025-05-17 Size : 20kb User : daiowen

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instantiate some simple examples, suitable for beginners to learn how to use so that we can correct
Date : 2025-05-17 Size : 228kb User : 伏杨

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if they MD5 encryption, and do not know the password. please database with a group of encrypted data it 16 : 7a57a5a743894a0e 32 : 21232f297a57a5a743894a0e4a801fc3 password is then ad min
Date : 2025-05-17 Size : 3.8mb User : 西西公主

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small procedures, the use of reference beginners
Date : 2025-05-17 Size : 1kb User : comeonck

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async-- RS232VERILOG HDL source
Date : 2025-05-17 Size : 3kb User : chenxiao

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ALU arithmetic logic unit to achieve a simple, using VHDL language, can be additive, subtractive, and the place and move around only one clock pulse
Date : 2025-05-17 Size : 101kb User : Jake

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VHDL prepared by the Counter procedures, in a yet-tube shown above show hours, and seconds can be reset respectively
Date : 2025-05-17 Size : 83kb User : Jake

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CPLD produced by the BCD decoder software, including source code, etc.
Date : 2025-05-17 Size : 176kb User : 胡庭豪

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file names : Digital Clock reference design document article : four documents/pdf /-page variety of languages : Chinese suitable targets : novice/Hand
Date : 2025-05-17 Size : 1.72mb User : rpeace
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