VHDL-FPGA-Verilog List Page 4168

VHDL-FPGA-Verilog list

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070330 Downloaded：0: VHDL third frequency procedures VHDL third frequency procedures VHDL third frequency procedures
Date : 2025-05-19 Size : 1kb User : 沈旭东
baseonVerilog Downloaded：0: basic arithmetic logic and their Verilog HDL model
Date : 2025-05-19 Size : 69kb User : 苏航
usb_jtag-20070128-1751 Downloaded：0: spreading online usb_blaster tenets of the CPLD Ituri source, usb key is timing converted into JATG sequential output!
Date : 2025-05-19 Size : 51kb User : 冯海
FPGAdigitaltimer Downloaded：0: designed to achieve this with a number of preset clock design, and specific requirements are as follows : 1. Display correctly, , 2. display correctly when, minutes and 3 seconds. with school, the whole point timekeeping
Date : 2025-05-19 Size : 491kb User : wangpeng
edaTimer Downloaded：0: digital clock is the main function Minutes date when the output function and the date and time set for the function , they can point the entire timekeeping functions. Digital Clock Design is the core issue date of the cl
Date : 2025-05-19 Size : 40kb User : wangpeng
usb2[1].0 Downloaded：0: usb download the source code is based on the Windows platform, to be adopted FPGA simulation. Can be the transmission of data
Date : 2025-05-19 Size : 193kb User :
vhdl-examples Downloaded：0: This is the EDA beginners can learn from two of electronic Cymometer VHDL Design Example
Date : 2025-05-19 Size : 11kb User : 刘磊
mc8051V1.4 Downloaded：0: 8,051 hard-core source code (VHDL), with all VHDL code, testing and documentation, environment, Comprehensive integrity of the script, such as development, certification, the source code for ASIC through films, and has b
Date : 2025-05-19 Size : 518kb User : 钟方
8051_nios_vhdl Downloaded：0: nois 8051 MCU platform in the realization of code (VHDL) from Altera Corporation, after strict verification of nuclear test
Date : 2025-05-19 Size : 100kb User : 钟方
8051_nios_doc Downloaded：0: 8051 MCU on the nois platform implementation of the documentation, explained very detailed, for the design very helpful, from Altera company. -nois 8051 MCU platform in the realization of documentation to explain in grea
Date : 2025-05-19 Size : 131kb User : 钟方
pic16f84 Downloaded：0: pic MCU HDL code, is the realization of Xilinx FPGA devices. After testing and validation
Date : 2025-05-19 Size : 47kb User : 钟方
DDR_SDRAM_Controller Downloaded：0: DDR RAM controller VHDL source code, achieving the platform of Lattice FPGA, functional verification through
Date : 2025-05-19 Size : 662kb User : 钟方

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