VHDL-FPGA-Verilog List Page 4164

VHDL-FPGA-Verilog list

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4bitadd Downloaded：0: four full adder original code, including the simulation code and four counter code.
Date : 2025-05-19 Size : 3kb User :
xuhuanjiucuo Downloaded：0: cycle error correction decoder VHDL code. Communications FPGA design code base.
Date : 2025-05-19 Size : 3kb User :
traffic_control Downloaded：0: design a crossroads for the traffic signal controller is a group in green, yellow and red lights to direct traffic. green, yellow and red, respectively for the duration of 20 seconds, five seconds and 25 seconds; When sp
Date : 2025-05-19 Size : 2kb User : 飘来的南风
serial_produce Downloaded：0: to design an 24-1 since the start of the pseudo-random number (111101011001000) generator. Design of a signal sequence generator to produce a sequence code 011100110011. Implementation sequence 1110100. Test sequence cod
Date : 2025-05-19 Size : 52kb User : 飘来的南风
multiple_pathanddopple Downloaded：0: Based on Multi-Drive transmission and Doppler frequency shift of the Rayleigh (Rayleigh) channel simulation main consideration different The simulation conditions
Date : 2025-05-19 Size : 116kb User : 飘来的南风
verilog_hdl_example Downloaded：0: verilog_hdl Guide 135 cases, the source, there is a need to look at the download
Date : 2025-05-19 Size : 154kb User : 磊
D_Clock Downloaded：0: digital clock is the main function Minutes date when the output function and the date and time set for the function , they can point the entire timekeeping functions. Digital Clock Design is the core issue date of the cl
Date : 2025-05-19 Size : 372kb User : 送水的
D_f_apparatus Downloaded：0: frequency measurement and measurement cycle is the basic method used to a fixed clock as a reference clock, measured single cycle to cycle counting, the counting unit time for the frequency. However, due to the frequency
Date : 2025-05-19 Size : 100kb User : 送水的
picoblaze07.3.20 Downloaded：0: verilog HDL picoblaze07.3.20
Date : 2025-05-19 Size : 918kb User : 赵腾飞
pljfpja Downloaded：0: frequency of fpja some of the procedures, and using high precision frequency measurement method to achieve. . . Can be measured one, and 1M
Date : 2025-05-19 Size : 1kb User : shjy
pio_top Downloaded：0: the verilog code input and output is a classic example. Together reference.
Date : 2025-05-19 Size : 516kb User : chenliang
ClockOut Downloaded：0: through verilog programming, FPGA arbitrary integer frequency of the source code
Date : 2025-05-19 Size : 1kb User : 田世坤

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