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AccountSystemOfPublicPhone
Downloaded:1
Using Verilog HDL language hardware design, the realization of the basic public telephone billing function, design integrity.
Date
: 2025-05-21
Size
: 390kb
User
:
余翔
pinlvji
Downloaded:0
Frequency meter, vhdl language, ispDesignEXPERT
Date
: 2025-05-21
Size
: 1kb
User
:
yuankui
DDS-2
Downloaded:0
FPGA realization of DDS with the schematic diagram, structural clarity, the use of bus-way communication with the outside Singlechip
Date
: 2025-05-21
Size
: 13kb
User
:
赵培立
cpld(huaqi)
Downloaded:0
Shanghai Bund to see the largest LED display in the kernel source code, mainly to complete the long-distance video signal transmission codec conversion and interface
Date
: 2025-05-21
Size
: 473kb
User
:
liao
yinpin
Downloaded:0
VHDL VHDL audio program audio program
Date
: 2025-05-21
Size
: 2.43mb
User
:
wangyufeng
xapp514
Downloaded:0
Date
: 2025-05-21
Size
: 5.57mb
User
:
mickwolf
xapp485
Downloaded:0
XAPP485- to as high as the rate of 666 Mbps in the Spartan-3E FPGA to achieve the solution of 1:7 serialization
Date
: 2025-05-21
Size
: 2.25mb
User
:
mickwolf
DISPLAY
Downloaded:0
With VHDL 1602 language of the small programs
Date
: 2025-05-21
Size
: 274kb
User
:
zhg
clock
Downloaded:0
VHDL language using an alarm clock to prepare procedures, can be the whole point of time, set time, set an alarm clock.
Date
: 2025-05-21
Size
: 750kb
User
:
zhg
box
Downloaded:0
VHDL language using FPGA-based waveform generator, using the procedures quartusII. 1602 liquid crystal display can show the current waveform types. Generated waveforms are sine wave, triangle wave, sawtooth and square wa
Date
: 2025-05-21
Size
: 1.63mb
User
:
zhg
test02
Downloaded:0
QuartusII prepared to use, based on the VHDL language button adder, from 0-11, also available via dial code switch control, from 11-0, joined the anti-tremor keyboard.
Date
: 2025-05-21
Size
: 200kb
User
:
zhg
i211_001
Downloaded:0
Dallas 1-Wire ip very useful, do not occupy CPU time.
Date
: 2025-05-21
Size
: 5kb
User
:
hjy
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.19
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4124
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4310
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