VHDL-FPGA-Verilog List Page 4083

VHDL-FPGA-Verilog list

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led Downloaded：0: VHDL achieve PLD electronic technology (text)
Date : 2025-08-18 Size : 1kb User : 阿乔
vhdl_crc Downloaded：0: Quartus VHDL language used in the development of CRC Checksum
Date : 2025-08-18 Size : 160kb User : 夏杰
uart.core.for.FPGA Downloaded：0: A UART of the FPGA core, accompanied by a detailed code of reading notes
Date : 2025-08-18 Size : 600kb User : 获得
vhdlkey7279 Downloaded：0: cpld, the environment is quartusii in VHDL language to develop reading and writing 7279 keyboard program
Date : 2025-08-18 Size : 596kb User : 夏杰
jsq60 Downloaded：0: Use MAX+ PLUSII can run, but also down to a virtual machine running on
Date : 2025-08-18 Size : 1kb User : 苏文将
VerilogHDL_counter Downloaded：1: err
Date : 2025-08-18 Size : 1.19mb User : 廖耿耿
VerilogHDL_trafficlight Downloaded：0: Using Verilog HDL language of the traffic lights control system, which is a complete set of BI subjects who were frequent, indicating decoding, countdown and dynamic display driver module, a very high practical value,
Date : 2025-08-18 Size : 355kb User : 廖耿耿
VerilogHDL_alarmclock Downloaded：0: Using Verilog HDL language, multi-function digital clock, including the four functions: the time display and settings, stopwatch, alarm clock, date display and settings, the source code for the FPGA and CPLD learner has
Date : 2025-08-18 Size : 3.1mb User : 廖耿耿
VerilogHDL_Lift_Control Downloaded：0: err
Date : 2025-08-18 Size : 1.14mb User : 廖耿耿
VerilogHDL_StepperMotor_control Downloaded：0: Using Verilog HDL language of the stepper motor position system, stepper motor speed, acceleration, deceleration, positioning, and speed and can do addition and subtraction continuously adjustable speed of the procedure,
Date : 2025-08-18 Size : 1.4mb User : 廖耿耿
VerilogHDL_DC_Motor_control Downloaded：0: Using Verilog HDL language of the DC motor control system, mainly the completion of DC motor speed control, a typical three-loop (position, speed and current feedback) DC motor control system for control-type high-value
Date : 2025-08-18 Size : 1.34mb User : 廖耿耿
iir Downloaded：0: VHDL of IIR digital filter coefficients are designed using Matlab
Date : 2025-08-18 Size : 1kb User : 杨洁

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