VHDL-FPGA-Verilog List Page 3983

VHDL-FPGA-Verilog list

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7led Downloaded：0: Seven-Segment display a common denominator coding VHDL code design
Date : 2025-05-30 Size : 3kb User : linew
76_PID Downloaded：0: A very good motor speed controller VHDL design source code
Date : 2025-05-30 Size : 2kb User : linew
52_divider Downloaded：0: Times to achieve a (sub) prescaler VHDL design source code
Date : 2025-05-30 Size : 1kb User : linew
divide Downloaded：0: Based on CPLD/FPGA half-integer frequency divider
Date : 2025-05-30 Size : 17kb User : linew
sqrt Downloaded：0: Verilog hardware and written calculation algorithm uses the square root of the square root of the same algorithm
Date : 2025-05-30 Size : 17kb User : lizhizhou
sinfunction Downloaded：0: CORDIC algorithm with transcendental function, sin, cos by this method can also realize other sinhx, coshx, ex. Verilog code used to prepare
Date : 2025-05-30 Size : 231kb User : yu_leo
VHDLjindianshili Downloaded：0: 37 classic VHDL procedures. Have comparators, Seven-Segment decoder, such as state machines.
Date : 2025-05-30 Size : 39kb User : kcamellia
jianpan Downloaded：0: Beijing-based company produced innovative experiments of the EDA toolbox display the keyboard scanning and synchronization process. Quartusll.5.1 version of the compiler environment. FPGA chip for EP18CQ240C6
Date : 2025-05-30 Size : 147kb User : ck
8led-display Downloaded：0: Beijing-based company produced the EDA innovation toolbox experimental LED scanning display program. Able to show that 8-digit numbers. Quartusll.5.1 version of the compiler environment. FPGA chip for EP18CQ240C6
Date : 2025-05-30 Size : 153kb User : ck
adc0809 Downloaded：0: Beijing-based company produced innovative EDA experimental toolbox of digital-analog conversion process. The program will be entered into the 5V signal from 01 to FF quantified by two digital tube display. Quantify the a
Date : 2025-05-30 Size : 158kb User : ck
uart_transmitter Downloaded：0: Very good info. for RS-232 transmitter VHDL code .
Date : 2025-05-30 Size : 1kb User : wan mi
uart_receiver Downloaded：0: Very good info. for RS-232 receive VHDL code .
Date : 2025-05-30 Size : 1kb User : wan mi

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