VHDL-FPGA-Verilog List Page 3980

VHDL-FPGA-Verilog list

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JK_FF Downloaded：0: Verilog language used to achieve the JK flip-flop can be integrated to simulation through
Date : 2025-05-30 Size : 74kb User : zhuangqi
pinlvji Downloaded：0: Simple digital frequency meter, source for the input, can measure their frequencies maxplux use, the need for standards 1Hz clock signal.
Date : 2025-05-30 Size : 6kb User : xzy
ps2_1 Downloaded：0: EDA Experimental PS2 keyboard experiment: the use of the keyboard as input devices, displays as output devices, FPGA to keyboard input of the numeric keys to encode the encoding, and then displayed on the monitor.
Date : 2025-05-30 Size : 2kb User : 黄龙
transfer_1 Downloaded：0: EDA experiment -UART serial port experiment: UART consists of data bus interface, control logic, baud rate generator, sending part and receiving part. UART transmitter The transmitter is output 1 bit every 16 CLK16 clock
Date : 2025-05-30 Size : 2kb User : 黄龙
AvalonPwm Downloaded：0: SOPC Experimental Hello World Experiment: Start Quartus II software, choose File → New Project Wizard, in the resulting dialog box fill in the name of 2 items, click Finish, and then select
Date : 2025-05-30 Size : 1.4mb User : 黄龙
sopc Downloaded：1: The SOPC experiment - custom PWM components: take a PWM component with an Avalon Slave interface as an example of how to customize the components. An Avalon Slave interface can have CLK, chipselect, address, read, readda
Date : 2025-05-30 Size : 6.83mb User : 黄龙
8086vga Downloaded：0: : Two table tennis Requires: D2SB and DIO4 with VGA monitor and PS2 Keyboard
Date : 2025-05-30 Size : 1.89mb User : wangdi
kevin_timer Downloaded：0: FPGA digital stopwatch and complete display.
Date : 2025-05-30 Size : 1kb User : chen
counter Downloaded：0: VHDL counter design, has been tested in the FPGA
Date : 2025-05-30 Size : 1kb User : chen
addersubtractor Downloaded：0: Addition and subtraction can realize the VHDL source code can be run in FPGA
Date : 2025-05-30 Size : 1kb User : chen
pcpu Downloaded：0: CPU can realize the VHDL source code can be run in FPGA
Date : 2025-05-30 Size : 1.58mb User : chen
MP8086 Downloaded：0: VHDL source code of the X8086, you can achieve in the FPGA
Date : 2025-05-30 Size : 491kb User : chen

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