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VHDL-FPGA-Verilog list
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Series FPGA using EP1C realize the function of Tennis Game
Date : 2025-05-30 Size : 37kb User : Franklin

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With EP1C realize DAC0832 series FPGA control
Date : 2025-05-30 Size : 51kb User : Franklin

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This procedure using VHDL language realize the function of tug-of-war game
Date : 2025-05-30 Size : 737kb User : wangjiabin

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PS2 mouse
Date : 2025-05-30 Size : 109kb User : 陈盛宜

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ppm PPM digital base-band system design, including complete engineering and QuartusII ModelSim simulation files
Date : 2025-05-30 Size : 249kb User : wanyou

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Using VHDL written DS18B20 temperature acquisition procedures, QuartusII complete projects, flexible control and easy expansion
Date : 2025-05-30 Size : 98kb User : wanyou

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Using FPGA, VHDL realize the UART core, quartusII complete projects, practical
Date : 2025-05-30 Size : 617kb User : wanyou

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FPGA using VHDL written FSK procedures, control of a flexible, complete works
Date : 2025-05-30 Size : 265kb User : wanyou

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Verilog HDL achieved with 83 encoders.
Date : 2025-05-30 Size : 81kb User : zhuangqi

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Realized using Verilog language 8Bit encoder.
Date : 2025-05-30 Size : 91kb User : zhuangqi

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Verilog language used to achieve a common decoder 3-8.
Date : 2025-05-30 Size : 76kb User : zhuangqi

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Verilog language used to achieve the full adder can be integrated to simulation through
Date : 2025-05-30 Size : 70kb User : zhuangqi
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