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VHDL-FPGA-Verilog list
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4M generated using the VHDL language frequency, used to describe the hardware features
Date : 2025-06-23 Size : 54kb User : yigezi

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A full adder and its source code to achieve the MAX series of devices to achieve the functions of the All-Canadian
Date : 2025-06-23 Size : 13kb User : yigezi

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decoder3_8 to achieve the realization of the FPGA or CPLD decoder functions 3-8
Date : 2025-06-23 Size : 17kb User : yigezi

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failed to translate
Date : 2025-06-23 Size : 19kb User : yigezi

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This is an 8-frequency design process of the VHDL language can also be seen as a hexadecimal counter 8
Date : 2025-06-23 Size : 44kb User : yigezi

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VHDL language with the design of traffic signals, and connected with the hardware.
Date : 2025-06-23 Size : 69kb User : 张艳

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Alarm program based on Verilog HDL, run on DE2 Board
Date : 2025-06-23 Size : 138kb User : 张智

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DW8051 is designed by synopsys, and its instruction cycle is 4 clock, which lead to about 3 times faster than Intel 8051 with the same oscillator frequency. I writed ram, rom, some other perpherals such as DES, RNG, and
Date : 2025-06-23 Size : 1.51mb User : myfingerhurt

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ALTERA Nios II Embedded Evaluation Kit development board manufacturers (terasic) to provide multi-media display boards (Terasic Multimedia Touch Panel Daughter Board (MTDB)) the expansion of the development package. Wher
Date : 2025-06-23 Size : 26.19mb User : myfingerhurt

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MODELSIM's classic course, which can quickly learn some basic application of MODELSIM, can quickly learn to MODELSIM application of some basic
Date : 2025-06-23 Size : 776kb User : 张文祺

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LCD control procedure for the preparation of the hardware description language VHDL, along with simulation results, the learning materials are hard to come by
Date : 2025-06-23 Size : 4kb User : chenqin

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Verilog SPI
Date : 2025-06-23 Size : 48kb User : lanbow
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