VHDL-FPGA-Verilog List Page 3585

VHDL-FPGA-Verilog list

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ref3 Downloaded：0: nexys 2 vhdl reference project for uart
Date : 2025-06-27 Size : 484kb User : Mishu
1 Downloaded：0: Multi-function waveform generator square wave (variable duty cycle) triangular wave
Date : 2025-06-27 Size : 1kb User : wanghua
vhdl Downloaded：0: 74ls164 8-bit shift register and a string into
Date : 2025-06-27 Size : 1kb User : fankexing
baheyouxiji Downloaded：0: the code of baheyouxiji in vhdl
Date : 2025-06-27 Size : 6kb User : Henry
qda Downloaded：0: Answer quiz three-way, and the use of VHDL design of each module s Answer, and the use of EDA tools for simulation of the module. Answer quiz design is divided into four modules: the differential latch module answer time
Date : 2025-06-27 Size : 229kb User : menglj
VHDL Downloaded：0: Written in VHDL code used to achieve arbitrary integer frequency, their frequency as long as the modified parameter. We hope to be useful
Date : 2025-06-27 Size : 1kb User : tianson
tt Downloaded：0: Determine the motor shift, and the axial ratio at the output pulses of the VHDL code.
Date : 2025-06-27 Size : 1kb User : tianson
t1 Downloaded：1: Motor M/T method velocimetry of the VHDL code, as long as the modified value of cnt to modify the size of M/T method of frequency switching, when cnt is less than for the T method, for M greater than law.
Date : 2025-06-27 Size : 1kb User : tianson
clock Downloaded：0: FPGA electronic clock can be set to 12-hour system and 24-hour system!
Date : 2025-06-27 Size : 1kb User : tianson
Sequencedetector Downloaded：0: Sequence detector (for example 1010111)
Date : 2025-06-27 Size : 1kb User : 赵珑
Paralleladder Downloaded：0: VHDL code parallel adder
Date : 2025-06-27 Size : 1kb User : 赵珑
Serialadder Downloaded：0: Serial adder five addition operations can be achieved
Date : 2025-06-27 Size : 1kb User : 赵珑

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