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VHDL-FPGA-Verilog list
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shift_reg_ps
Downloaded:0
parallel to serial shift register
Date
: 2025-06-29
Size
: 1kb
User
:
meysam
HDLC_controller
Downloaded:0
a verilog code for hdlc controller
Date
: 2025-06-29
Size
: 1kb
User
:
meysam
division_cordic
Downloaded:0
verilog code for division based on cordic algorithm
Date
: 2025-06-29
Size
: 1kb
User
:
meysam
GraduationProject
Downloaded:0
Conducted an 8-bit CISC processor design and implementation, the microprocessor contains the basic functions of a computer module, and a hierarchical memory design. Instructions in the instruction set is divided into fou
Date
: 2025-06-29
Size
: 506kb
User
:
李东升
fifo_sync
Downloaded:0
vhdl fifo sound code
Date
: 2025-06-29
Size
: 1kb
User
:
zxb
NiosII_Software_Developer_Handbook
Downloaded:0
Nios II Software Developer s Handbook
Date
: 2025-06-29
Size
: 1.57mb
User
:
weiw
FPGA_SOPC_starter
Downloaded:0
FPGA_SOPC_starter
Date
: 2025-06-29
Size
: 1.94mb
User
:
weiw
nios2_hardware_tutorial
Downloaded:0
nios2_hardware_tutorial
Date
: 2025-06-29
Size
: 664kb
User
:
weiw
embedded_design_handbook
Downloaded:0
embedded_design_handbook
Date
: 2025-06-29
Size
: 1.67mb
User
:
weiw
FPGA27examples
Downloaded:0
FPGA is used for 27 examples of confusion for the novice or the person should be a bit useless
Date
: 2025-06-29
Size
: 1.22mb
User
:
孔利峰
vhdl
Downloaded:0
Very high speed integrated Hardware Description Language (VHDL)- is the IEEE, industry-standard hardware description language- rather than using language to describe graphics hardware, such as easy to modify the circuit
Date
: 2025-06-29
Size
: 1.66mb
User
:
sherry
chuzhuche2
Downloaded:0
VHDL language design taxi billing, and can simulate the vehicle to start, stop, pause, speed, etc., and to preset the initial charges, fees and charges per kilometer, plus car mileage charges, billing functions to achiev
Date
: 2025-06-29
Size
: 1.81mb
User
:
阿Q
«
1
2
...
.35
.36
.37
.38
.39
3540
.41
.42
.43
.44
.45
...
4310
»
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