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VHDL-FPGA-Verilog list
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tests
Downloaded:0
test circuit about VHDL test program can be run
Date
: 2025-07-15
Size
: 770kb
User
:
wwwss
counterFastSlow
Downloaded:0
Complete vhdl counter, a variety of functions. stop/en/fast/slow /
Date
: 2025-07-15
Size
: 1.21mb
User
:
wwwss
vhd_SDH
Downloaded:0
SDH transmission from a continuous stream of bytes to identify header, extract F1 bytes, respectively, in accordance with 64K-rate serial output bit stream and clock F1, of which 64K clock requires a basic uniform. File
Date
: 2025-07-15
Size
: 69kb
User
:
ljk05
usb
Downloaded:0
contains important information about usb
Date
: 2025-07-15
Size
: 416kb
User
:
usbfpga
WORKS
Downloaded:0
Project of Adquisition Data, show in VGA and send to usb host
Date
: 2025-07-15
Size
: 9.46mb
User
:
lagartojj
Verilog-Hdl_Circuit_Design
Downloaded:0
Verilog-Hdl Circuit Design
Date
: 2025-07-15
Size
: 618kb
User
:
zhenglong
fpga2
Downloaded:0
Are learning FPGA, such information to share with you.
Date
: 2025-07-15
Size
: 31kb
User
:
李
fpga3
Downloaded:0
Are learning FPGA, such information to share with you.
Date
: 2025-07-15
Size
: 2.66mb
User
:
李
fpga4
Downloaded:0
Are learning FPGA, such information to share with you.
Date
: 2025-07-15
Size
: 70kb
User
:
李
8255int
Downloaded:0
8259 Interrupt Control LED flip-chip LED lit or extinguished SP button
Date
: 2025-07-15
Size
: 1kb
User
:
pretty
clock
Downloaded:0
On vhdl digital clock, respectively, by 6 digital tube display 24 hours, 60 minutes, 60 seconds of the count display with school hours, school hours, seconds, cleared correction function, respectively, by three buttons c
Date
: 2025-07-15
Size
: 261kb
User
:
ly
stopwatch
Downloaded:0
On vhdl digital stopwatch, timing accuracy of 1/100 seconds, the longest time time of 59 minutes 59.59 seconds with reset switch, start-stop switches validation is available.
Date
: 2025-07-15
Size
: 260kb
User
:
ly
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1
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.35
.36
.37
.38
.39
3340
.41
.42
.43
.44
.45
...
4310
»
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