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VHDL-FPGA-Verilog list
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sineWave
Downloaded:0
In the FPGA to generate sine wave output, VHDL language
Date
: 2025-07-16
Size
: 1kb
User
:
Jim Lai
vhdl
Downloaded:0
vhdl
Date
: 2025-07-16
Size
: 57kb
User
:
vhdl
CPU_Core
Downloaded:0
This is the 8051 core, a very useful reference can be used directly
Date
: 2025-07-16
Size
: 2kb
User
:
coolxgz
cml
Downloaded:0
Verilog-based digital baseband communication system 3. Project Description: The system is one of the topics Communication Theory course design, using Verilog language digital baseband communication system applications, t
Date
: 2025-07-16
Size
: 248kb
User
:
chengmengli
51-DDS
Downloaded:0
Includes not only the FPGA source code also includes a 51 SCM control source, has been achieved DDS functions, absolutely original.
Date
: 2025-07-16
Size
: 2.08mb
User
:
张文琪
vhdl
Downloaded:0
vhdl half-Canadian half-and full-adder function of the realization that the preparation of a specific code
Date
: 2025-07-16
Size
: 1kb
User
:
肖海波
8bitprocessor
Downloaded:0
With the function to achieve eight-processor fpga program
Date
: 2025-07-16
Size
: 216kb
User
:
PETER
LogicLock
Downloaded:0
logiclock functional demo vhdl language environment for realization of quartus
Date
: 2025-07-16
Size
: 83kb
User
:
PETER
HelloLED
Downloaded:0
nios achieve helloled lamp lit environment with the vhdl language quartus to achieve
Date
: 2025-07-16
Size
: 3.79mb
User
:
PETER
USB2.0
Downloaded:1
usb2.0 fpga using vhdl language program quartus environment to achieve
Date
: 2025-07-16
Size
: 3.4mb
User
:
PETER
charLCD
Downloaded:0
Character lcd program vhdl language quartus environment to achieve
Date
: 2025-07-16
Size
: 306kb
User
:
PETER
ECE200_LAB4
Downloaded:0
Control unit for DLX processor
Date
: 2025-07-16
Size
: 55kb
User
:
Raj Parihar
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