VHDL-FPGA-Verilog List Page 3067

VHDL-FPGA-Verilog list

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ep1c6_29_dds Downloaded：0: this is a dds program by VHDL .Tt is a very accutate program.
Date : 2025-11-16 Size : 105kb User : name
fenpin Downloaded：0: Clock divider, beginners can download the study results were quite good
Date : 2025-11-16 Size : 2kb User : huangdunyin
fskcodec Downloaded：0: fskcode and fskdec, need this to do the exercises can be downloaded
Date : 2025-11-16 Size : 245kb User : huangdunyin
cmicodec Downloaded：0: CMI encoding and decoding, on the design of great help for study and design
Date : 2025-11-16 Size : 180kb User : huangdunyin
FFT Downloaded：0: FFT of the source code, FFT of the source code, FFT of the source
Date : 2025-11-16 Size : 2kb User : huangdunyin
askcodec Downloaded：0: ASK source encoding and decoding can be used in learning and design
Date : 2025-11-16 Size : 238kb User : huangdunyin
dds_rom Downloaded：0: This is the Verilog write DDS, the common module, the module for the rom.
Date : 2025-11-16 Size : 5kb User : name
filter_200us Downloaded：0: This is written in Verilog delay 200US procedures used for the Verilog module.
Date : 2025-11-16 Size : 1kb User : name
lcd_vhdl Downloaded：0: This is the LCD diver code that is written by vhdl
Date : 2025-11-16 Size : 1.52mb User : 谢立寅
ad0809 Downloaded：0: The program is based on ad0809, via digital display 0V-+5 V voltage.
Date : 2025-11-16 Size : 1.54mb User : Ricky
adder Downloaded：0: 8 BIT STRUCTURAL CODE IN VHDL
Date : 2025-11-16 Size : 111kb User : SHRAYANTH
booth Downloaded：0: BOOTH MULTIPLIER IN VHDL
Date : 2025-11-16 Size : 641kb User : SHRAYANTH

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