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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 111kb
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  • Author :SHRA*****
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8 BIT STRUCTURAL CODE IN VHDL
Packet file list
(Preview for download)
adder.ise
adder.xise
adder.gise
ipcore_dir
adder.vhd
ADDER2_summary.html
ADDER2.prj
ADDER2.lso
ADDER2.xst
ADDER2.cmd_log
ADDER2.syr
ADDER2_vhdl.prj
adder.ntrc_log
add.vhd
ADDER2.ngc
ADDER2_xst.xrpt
add4.prj
add4.lso
add4.xst
add4.cmd_log
add4.syr
add4_vhdl.prj
add4.ngr
add4.ngc
add4_xst.xrpt
add4.stx
BIT_ADDER.udo
BIT_ADDER.fdo
BIT_ADDER_wave.fdo
transcript
vsim.wlf
add4_summary.html
add4.udo
add4.fdo
add4_wave.fdo
...er_xdb\tmp\ise.lock
.........\...\...\version
.........\...\...\__OBJSTORE__\Autonym
.........\...\...\............\common
.........\...\...\............\_ProjRepoInternal_
.........\...\...\............\ProjectNavigator11
.........\...\...\............\................\dpm_project_main\dpm_project_main
.........\...\...\............\................\................\dpm_project_main_StrTbl
.........\...\...\............\.nAutoRun\Scripts\RunOnce_tcl
.........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.........\...\...\............\.rojectNavigatorGui\Source-BehavioralSim-AutoCompile
.........\...\...\............\...................\Source-BehavioralSim-AutoCompile_StrTbl
.........\...\...\............\...................\Source-SynthesisOnly-AutoCompile
.........\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl
.........\...\...\............\...................\CViewSelector
.........\...\...\............\...................\CViewSelector_StrTbl
.........\...\...\............\...................\Process-BehavioralSim-
.........\...\...\............\...................\Process-BehavioralSim-_StrTbl
.........\...\...\............\...................\Process-BehavioralSim-DESUT_VHDL_ARCHITECTURE
.........\...\...\............\...................\Process-BehavioralSim-DESUT_VHDL_ARCHITECTURE_StrTbl
.........\...\...\............\...................\Process-SynthesisOnly-
.........\...\...\............\...................\Process-SynthesisOnly-_StrTbl
.........\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE
.........\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE_StrTbl
.........\...\...\............\...................\File-SynthesisOnly
.........\...\...\............\...................\File-SynthesisOnly_StrTbl
.........\...\...\............\...................\Library-SynthesisOnly
.........\...\...\............\...................\Library-SynthesisOnly_StrTbl
.........\...\...\............\xreport\Gc_RvReportViewer-Module-DataFactory-Default
.........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
.........\...\...\............\.......\Gc_RvReportViewer-Module-Data-ADDER2
.........\...\...\............\.......\Gc_RvReportViewer-Module-Data-ADDER2_StrTbl
.........\...\...\............\.......\Gc_RvReportViewer-Current-Module
.........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
.........\...\...\............\.......\Gc_RvReportViewer-Module-Data-add4
.........\...\...\............\.......\Gc_RvReportViewer-Module-Data-add4_StrTbl
.........\...\...\............\HierarchicalDesign\__stored_object_table__
.........\...\...\............\..................\HDProject\HDProject
.........\...\...\............\..................\.........\HDProject_StrTbl
.........\...\...\..REGISTRY__\Autonym\regkeys
.........\...\...\............\common\regkeys
.........\...\...\............\_ProjRepoInternal_\regkeys
.........\...\...\............\ProjectNavigator11\regkeys
.........\...\...\............\................\regkeys
.........\...\...\............\XSLTProcess\regkeys
.........\...\...\............\bitgen\regkeys
.........\...\...\............\cpldfit\regkeys
.........\...\...\............\dumpngdio\regkeys
.........\...\...\............\fuse\regkeys
.........\...\...\............\hprep6\regkeys
.........\...\...\............\map\regkeys
.........\...\...\............\netgen\regkeys
.........\...\...\............\.gc2edif\regkeys
.........\...\...\............\...build\regkeys
.........\...\...\............\..dbuild\regkeys
.........\
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