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VHDL-FPGA-Verilog list
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cic
Downloaded:0
Wireless communication in the DDS principle, to explain the FPGA to achieve digital frequency synthesizer
Date
: 2025-05-31
Size
: 43kb
User
:
Lay
design
Downloaded:0
State machine description style, with the value of the state machine structure- Huawei internal
Date
: 2025-05-31
Size
: 3kb
User
:
Lay
DDS
Downloaded:0
FPGA with DDS, code testing is correct, can be used for beginners to learn to use
Date
: 2025-05-31
Size
: 42kb
User
:
Lay
singnt
Downloaded:0
Based verilog sine generator,Can produce a sinusoidal signal
Date
: 2025-05-31
Size
: 1.44mb
User
:
林
FIFO_control
Downloaded:0
A 32* 8FIFO controller code, involving the input and output address changes and parameter applications.
Date
: 2025-05-31
Size
: 1kb
User
:
李瑞
lcdILI9325FPGA
Downloaded:0
lcdILI9325FPGA lcd FPGA
Date
: 2025-05-31
Size
: 3.57mb
User
:
张如美
verilogsram
Downloaded:0
FPGA VERILOG SRAM drive vhdl development
Date
: 2025-05-31
Size
: 83kb
User
:
张如美
fpga-KEY-UART-SRAM
Downloaded:0
fpga KEY UART SRAM driver VHDL VERILOG
Date
: 2025-05-31
Size
: 5kb
User
:
张如美
FFT
Downloaded:0
Verilog xilinx IP implementation FFT simulation
Date
: 2025-05-31
Size
: 2.84mb
User
:
欧阳
PowerSum
Downloaded:0
The main function of this module is to achieve power and data the unit to solve, that is the real part of the input signal, the imaginary part to solve the square and then put the two together, there are 1024 complex dat
Date
: 2025-05-31
Size
: 1kb
User
:
一哥
Zedboard_Pmod_CAM_5M_R__Demo
Downloaded:0
Under zedboard development environment, OV5620 VGA image capture and display system that uses BRAM cache Zhen
Date
: 2025-05-31
Size
: 4.1mb
User
:
刘亿
Zybo_Pmod_CAM_0.3M_QVGA
Downloaded:0
zybo development board, using ov7725 camera illumination, image acquisition and display system built
Date
: 2025-05-31
Size
: 2.01mb
User
:
刘亿
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.87
288
.89
.90
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.92
.93
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4310
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