VHDL-FPGA-Verilog List Page 2810

VHDL-FPGA-Verilog list

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alarm Downloaded：0: It designs a clock by Verilog
Date : 2025-11-21 Size : 702kb User : liuning0041
pong_bats Downloaded：0: it describes Pingpang Game
Date : 2025-11-21 Size : 3.45mb User : liuning0041
DDS_Adder Downloaded：0: DDS addition procedures, written with verilog program, implemented in the FPGA' s
Date : 2025-11-21 Size : 5kb User : 胡浩
bfgd_fpga Downloaded：0: ARM9-implemented data collection and storage, the use of the motherboard is the EP9315, the control section is the FPGA, all the code.
Date : 2025-11-21 Size : 975kb User : 郭超平
FPGA_Interface_verilog Downloaded：0: verilog digital interface for experimental procedures, including the matrix keyboard, buzzer, serial, i2c bus interface program instance.
Date : 2025-11-21 Size : 2.67mb User : wylie
lcd_driver Downloaded：0: FPGA-based LCD LCD driver compiled with VHDL, FPGA-based LCD LCD driver, VHDL language series
Date : 2025-11-21 Size : 2kb User :
VHDL Downloaded：1: Taxi the meter of the VHDL design code for the taxi the meter of the VHDL design code,
Date : 2025-11-21 Size : 6kb User :
autosell Downloaded：0: FPGA design code of vending machines vending machines FPGA design code
Date : 2025-11-21 Size : 2kb User :
cymometer Downloaded：0: VHDL design of digital frequency meter digital frequency meter VHDL code design code
Date : 2025-11-21 Size : 2kb User :
MYFX2 Downloaded：0: An FPGA simulation program, used to test the FPGA memory expansion
Date : 2025-11-21 Size : 1kb User : 闫冰冰
qd Downloaded：0: The VHDL design of digital Responder Responder of the VHDL code for design of digital code
Date : 2025-11-21 Size : 1kb User :
mms Downloaded：0: Four of the VHDL code design locks four VHDL code design code lock
Date : 2025-11-21 Size : 1kb User :

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