VHDL-FPGA-Verilog List Page 2811

VHDL-FPGA-Verilog list

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ADCINT Downloaded：0: The ADC0809 EDA applications, the use of VHDL Coding analog-digital conversion function is simple and easy.
Date : 2025-11-21 Size : 453kb User : 寒星
adder Downloaded：0: A full adder, using the drawing method will be made of two half adder symbol calls for the full adder, adder combination of sake, the method is simple and verified.
Date : 2025-11-21 Size : 184kb User : 寒星
CNT4 Downloaded：0: 4 binary counter addition, the 4 simple binary counting function, carry out, clear reset function, simple.
Date : 2025-11-21 Size : 175kb User : 寒星
COUNTER32B Downloaded：0: 32-bit shift register 32 functions to achieve specific right to register, simple structure, through the timing verification
Date : 2025-11-21 Size : 244kb User : 寒星
edit16_4 Downloaded：0: 16-4 encoder to achieve 16-bit to 4-bit code, is the inverse process decoder 4-16 through the timing verification
Date : 2025-11-21 Size : 211kb User : 寒星
8255_HDL Downloaded：0: it mainly describes how to finish a 8255 by HDL
Date : 2025-11-21 Size : 33kb User : liuning0041
eit8_3 Downloaded：0: 8-3 decoder, to achieve the inverse function of the decoder 3-8, simple, has passed the timing verification.
Date : 2025-11-21 Size : 210kb User : 寒星
4_2 Downloaded：0: Counter 4-bit binary addition, addition of simple features, up to 4, with binary calculations.
Date : 2025-11-21 Size : 369kb User : 寒星
SHFRT1_4 Downloaded：0: 4-bit shift register into the string out to achieve and string conversion, simple, through sequence verification.
Date : 2025-11-21 Size : 200kb User : 寒星
SHFRT4_1 Downloaded：0: Four series in and out of shift register, to achieve string and conversion, has passed the timing verification
Date : 2025-11-21 Size : 196kb User : 寒星
CNT10 Downloaded：0: Decimal counter, asynchronous reset, synchronous clear function, simple and easy, by timing verification.
Date : 2025-11-21 Size : 197kb User : 寒星
edit4_16 Downloaded：0: 4-16 decoder to achieve 4-16 in the decoding functions, similar to the 3-8 decoder, through the timing verification.
Date : 2025-11-21 Size : 449kb User : 寒星

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