VHDL-FPGA-Verilog List Page 2790

VHDL-FPGA-Verilog list

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FPGA_drive_VGA_test_verilog Downloaded：0: FPGA drive VGA test verilog
Date : 2025-11-21 Size : 8kb User : 飞琳_feeling
verilog_hjckzn Downloaded：0: Verilog Golden Reference Guide is Veri log hardware description language and its syntax and semantics of merging hardware design to apply it to a concise Quick Reference Guide
Date : 2025-11-21 Size : 458kb User : 李明
use_FPGA_control_VGA Downloaded：0: To achieve control using fpga vga output, the data is simple, but representative.
Date : 2025-11-21 Size : 51kb User : li
ddr2_test Downloaded：0: A written using Verilog DDR2 controller (our project in Altera' s FPGA) successful simulation, and used to control the DDR2 in project
Date : 2025-11-21 Size : 10.37mb User : 左洪成
canlender_clock Downloaded：0: The design of electronic calendar program design verilog source code simulation
Date : 2025-11-21 Size : 2.73mb User : 断桥
DAstate Downloaded：0: State machine, with the FPGA to send the serial command control program of DA
Date : 2025-11-21 Size : 10kb User : here
subber Downloaded：0: Completion of a binary full subtracter design, the use of schematic and text input method input method were realized, hierarchical design, the bottom of the half adder (also used schematic entry method) and the compositi
Date : 2025-11-21 Size : 113kb User : sxh
XLXH Downloaded：0: Complete sequence is 0111010011011010 sequence generator 2. State machine design using serial sequence of 11 010 detector 3. If the sequence is detected to meet the requirements, the output display bit is " 1" ,
Date : 2025-11-21 Size : 161kb User : sxh
Verilog Downloaded：0: Implemented using verilog electronic calendar program, compiled by the Quartus II
Date : 2025-11-21 Size : 3kb User : 断桥
count Downloaded：0: Setting a control bit M, requires M = 0: mode 23 counts M = 1: model 109 counts counting results with the two of static digital display to show BCD code
Date : 2025-11-21 Size : 207kb User : sxh
S7_PS2_RS232 Downloaded：0: The experimental realization of PS/2 interface and RS-232 data interface, PS/2 keyboard, press the button, you can automatically send RS-232 debug serial port to the host terminal (sscom32.exe) and reception area in the
Date : 2025-11-21 Size : 56kb User : 陈亮
S6_VGA_change Downloaded：0: 1. Source file in src directory, QII Proj project files in the directory 2. Program can display in 800x600 resolution VGA display and square-wave sample letters Example 3. Specific design reference code.
Date : 2025-11-21 Size : 436kb User : 陈亮

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