VHDL-FPGA-Verilog List Page 2731

VHDL-FPGA-Verilog list

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UART_TRANSMITTER Downloaded：0: UART receive, use three-step program, very standardized
Date : 2025-11-21 Size : 1kb User : 学习
ENCODE_8B_10B Downloaded：0: 8B-10B code, Verilog code, through the compilation, simulation, code specifications, clear
Date : 2025-11-21 Size : 1kb User : 学习
FFT Downloaded：0: it is a introduction about FFT
Date : 2025-11-21 Size : 145kb User : liuning0041
music Downloaded：0: Make their own music player to listen to VHDL' s slowly Butterfly Lovers
Date : 2025-11-21 Size : 337kb User : lucas
udcounter.v Downloaded：0: this program is for 8 bit up counter
Date : 2025-11-21 Size : 17kb User : dwijnesh
awgn Downloaded：0: awgn in vhdl
Date : 2025-11-21 Size : 1kb User : terry.ding
nios_dds Downloaded：0: Using Altera' s NIOS core, with a separate accumulator, to achieve a sine wave, triangle wave, sawtooth and square wave generation circuit DDS system clock up to 120MHz, with high-speed DAC, can produce up to about 40
Date : 2025-11-21 Size : 2.97mb User : Tomy Lee
AlteraFPGA_CPLD1 Downloaded：0: Altera FPGA_CPLD Design Basics [1] \ AlteraFPGA_CPLD1
Date : 2025-11-21 Size : 21.76mb User : 学习
SATA Downloaded：0: excellent information and descripiton of SATA protocol
Date : 2025-11-21 Size : 372kb User : lvz
SDRAM Downloaded：0: some information and description about SDRAM
Date : 2025-11-21 Size : 174kb User : lvz
Logicsynthesis Downloaded：0: describe the steps of logic synthesis
Date : 2025-11-21 Size : 1.22mb User : lvz
VERILOG_VLSI_LAB_MANUAL Downloaded：0: VHDL Lab Manual useful for lab purpose
Date : 2025-11-21 Size : 1.83mb User : Vinodh

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