VHDL-FPGA-Verilog List Page 272

VHDL-FPGA-Verilog list

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my_emac Downloaded：0: Modelsim simulation port MAC transceiver packet implementation code
Date : 2025-05-28 Size : 2kb User : 施楠
mac Downloaded：0: Based on the Internet port to send and receive data and parse the contents of the data verilog code
Date : 2025-05-28 Size : 140kb User : 施楠
bch_dec_enc_dcd Downloaded：0: On the BCH encoder and decoder, can achieve 16-bit, 32-bit, 64-bit, 128-bit encoding and decoding error correction, 2-bit error correction, Verilog implementation
Date : 2025-05-28 Size : 1.05mb User : 小小
source Downloaded：0: 2. /qdr2/source/qdr2_io.v > Top level file includes declarations of HSTL1 and LVTTL I/O standards /qdr2/source/qdr2.v > Main module of the QDR memory controller /qdr2/source/pipeline.v > Pipeline module for increasing p
Date : 2025-05-28 Size : 16kb User : liuxuemin
FPGA-8253 Downloaded：0: In this paper, based on FPGA computer and interface experimental platform design issues, first of all, this article on the FPGA-based computer and interface experimental platform design issues, first described the core b
Date : 2025-05-28 Size : 568kb User : 吕攀攀
flash_M25P64_Verilog Downloaded：0: Fpga read and write flash source program, we hope to be useful, you can borrow, change on it
Date : 2025-05-28 Size : 2kb User : 刘蒹
Vhdl-code-a-testbench Downloaded：0: LED code & testbench for VHDL
Date : 2025-05-28 Size : 3kb User : 窦莱
buzzer_piano Downloaded：0: To achieve a simple piano function. Press the keys K1 ~ K6, BUZZER issued DO, RE, ME, FA, SO, LA six notes.
Date : 2025-05-28 Size : 3.21mb User : 谢炀
ADC_dis Downloaded：0: Using pcf8591 chip to achieve ADC function, and read the AD value to the digital tube.
Date : 2025-05-28 Size : 4.19mb User : 谢炀
ds1302 Downloaded：0: Realize RTC (Real Time Clock) function with DS1302 chip. Drive DS1302 chip, give the chip initial value, and through the LED display DS1302 real-time seconds (0 ~ 9).
Date : 2025-05-28 Size : 3.61mb User : 谢炀
vga_snake Downloaded：0: This is a VGA-based display and PS2 keyboard greedy snake game when the screen prompts enter to play , W, S, A, D four CS game arrow keys, you can press P (PAUSE) to pause, enter the selection off Level, then press G (GO
Date : 2025-05-28 Size : 14.41mb User : 谢炀
DDS-verilog Downloaded：0: DDS is a direct digital synthesizer (Direct Digital Synthesizer) of the English abbreviation, is a key digital technology. Compared with the traditional frequency synthesizer, DDS has the advantages of low cost, low powe
Date : 2025-05-28 Size : 2kb User : 林威

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