VHDL-FPGA-Verilog List Page 2701

VHDL-FPGA-Verilog list

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CRC Downloaded：0: CRC checksum generation cycle. File is (40,32) of the check code generation circuit, the use of serial input, serial output mode.
Date : 2025-11-21 Size : 140kb User : 李雪茹
iscas89_verilog Downloaded：0: ISCAS89 sequential benchmark circuits Verilog HDL
Date : 2025-11-21 Size : 1.23mb User : tao
FPGA_SOPC_starter Downloaded：0: Fpga sopc very good introductory programming book is ideal for beginners to learn
Date : 2025-11-21 Size : 1.05mb User : lincheng
CRCDecoding Downloaded：0: CRC error detection process. Not only error detection correction. (40,32) and block code error detection, feedback function: x8+ x7+ x4+ x3+ x+1
Date : 2025-11-21 Size : 144kb User : 李雪茹
ovi.verilog.lrm.1.0 Downloaded：0: Original rev 1.0 Verilog Language Reference Manual
Date : 2025-11-21 Size : 511kb User : hot_mot
LDPC Downloaded：0: ee
Date : 2025-11-21 Size : 3.26mb User : 王明
pci32lite_oc Downloaded：0: PCI 32bit Slave Verilog code
Date : 2025-11-21 Size : 18kb User : chen
jpeg_verilog Downloaded：0: Jpeg compression of the Verilog code
Date : 2025-11-21 Size : 159kb User : chen
ddr Downloaded：0: VHDL code for DDR SDRAM controller, supporting 32bits data bus
Date : 2025-11-21 Size : 9kb User : chen
simple_spi_top Downloaded：0: A simple SPI interface controller code. Verilog
Date : 2025-11-21 Size : 3kb User : chen
CPU Downloaded：0: CPU design a complete water, quartus platform, Verilog realization
Date : 2025-11-21 Size : 1.05mb User : 涯
MIPS_CPU Downloaded：0: A complete MIPS CPU design, innovative design projects, detailed project design report containing
Date : 2025-11-21 Size : 1.78mb User : 涯

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