VHDL-FPGA-Verilog List Page 2533

VHDL-FPGA-Verilog list

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example4 Downloaded：0: DIP switches and display: implement the DIP switch is visible.
Date : 2025-11-22 Size : 29kb User : YJ
example5 Downloaded：0: Key Control: 8 buttons corresponding to 8 digits display, the initial value is 0.
Date : 2025-11-22 Size : 34kb User : YJ
example6 Downloaded：0: Key control and eliminate buffeting Modified: KEY1 and KEY2 control data using addition and subtraction.
Date : 2025-11-22 Size : 27kb User : YJ
Leg8 Downloaded：0: To be commercial cpu 8-bit high-speed chip design, verilog language compiler, ISE platform to complete
Date : 2025-11-22 Size : 856kb User : 张德志
univ Downloaded：0: universal binary counter
Date : 2025-11-22 Size : 1kb User : cdac
attachments_15_02_2011. Downloaded：0: barrel shifter in vhdl coding
Date : 2025-11-22 Size : 1kb User : cdac
attachments_15_02_2011.. Downloaded：0: mod10 counter in vhdl
Date : 2025-11-22 Size : 1kb User : cdac
attachments_15_02_2011... Downloaded：0: decoder in vhdl coding
Date : 2025-11-22 Size : 1kb User : cdac
reexercise3 Downloaded：0: shift register in vhdl
Date : 2025-11-22 Size : 1kb User : cdac
VHDL Downloaded：0: Operation with the VHDL language design flow
Date : 2025-11-22 Size : 298kb User : xie
pwm_out Downloaded：0: PWM output control LED display, two buttons control the FPGA output pulse duty cycle, pulse to directly drive LEDs LED, with different duty cycle, LED brightness is different
Date : 2025-11-22 Size : 39kb User : 王砂
chuzuchejifei Downloaded：0: Taxi meter, VHDL writing. Reference
Date : 2025-11-22 Size : 9kb User : yueping

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