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VHDL-FPGA-Verilog list
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Through the two-wire I2C serial bus protocol data SDA and serial clock SCL line is connected to the bus transfer information between devices, each device has a unique address identification, and can be used as a transmit
Date : 2025-11-22 Size : 223kb User : houge

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FPGA realization of music players, broadcasting buzzer, LED dot matrix display screen, synchronized scrolling lyrics and music synchronization effect, buttons control play, pause, stop, replay.
Date : 2025-11-22 Size : 2.32mb User : 顿河战神

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decimal counter to start from 0 to 10 decimal up
Date : 2025-11-22 Size : 1kb User : mido/midoo

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Design of FPGA-frequency meter
Date : 2025-11-22 Size : 682kb User : zhangquanling

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Use VHDL to write a table tennis game of the source.
Date : 2025-11-22 Size : 913kb User : wyx006

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74ls47 schematic
Date : 2025-11-22 Size : 1kb User : 王瑞

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This is an asychronous dual port ram
Date : 2025-11-22 Size : 1kb User : iman

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Prepared using VHDL language and string conversion process, we look at it
Date : 2025-11-22 Size : 2kb User :

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Digital filtering procedures for field testing, the use of Verilog language
Date : 2025-11-22 Size : 1.03mb User :

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MCU and FPGA development board a set of information for beginners to learn
Date : 2025-11-22 Size : 1.08mb User :

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8-bit subtractor, I run the normal version of quartus 9.0, we rest assured Download
Date : 2025-11-22 Size : 1kb User :

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This paper Detailed description of the basic VHDL statements for beginners has a very big help.
Date : 2025-11-22 Size : 272kb User : 安荣
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