VHDL-FPGA-Verilog List Page 2462

VHDL-FPGA-Verilog list

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Lab23_AD Downloaded：0: Measurement connected to the P0.27, P0.28 pin AIN0, AIN1 analog inputs of the two DC voltage adjustable potentiometer, the analog into a digital number to send LED digital display
Date : 2025-11-23 Size : 59kb User : liutao
basegate Downloaded：0: verilog description of the basic gate circuit functional simulation waveforms with
Date : 2025-11-23 Size : 2.82mb User : allen-haha
2 Downloaded：0: EDA curriculum design, the use of VHDL language, PLD design FPGA-based taxi billing system, the company selected ALTERA low power, low-cost, high-performance FPGA chip EPF10K10, the MAX+ PLUS Ⅱ software as a development
Date : 2025-11-23 Size : 8kb User : wang
3 Downloaded：0: Electronic digital clock is actually a standard frequency (1Hz) to count the counting circuit. Oscillator clock signal through the divider formed second pulse signal and second counter counts the input pulse signal, and
Date : 2025-11-23 Size : 318kb User : wang
DDS Downloaded：0: DDS digital frequency synthesis verilog code, with a cosine look-up table, etc.
Date : 2025-11-23 Size : 16mb User : allen-haha
rom Downloaded：0: The source code is based on the VHDL code look-up table DDS
Date : 2025-11-23 Size : 636kb User : allen-haha
datacompare Downloaded：0: Verilog language used to compare data with simulation waveform control
Date : 2025-11-23 Size : 1.1mb User : allen-haha
keyscan Downloaded：0: Verilog-based keyboard scanner, to achieve 4* 4 keyboard scanning
Date : 2025-11-23 Size : 2.72mb User : allen-haha
Verilog Downloaded：0: The PPT Verilog tutorials, concise description of how to write Verilog program is very good information to learn Verilog language
Date : 2025-11-23 Size : 168kb User : lxz
touch_screen_verilog Downloaded：0: Touch screen display code
Date : 2025-11-23 Size : 2kb User : 王国成
finial_test Downloaded：0: Convolutional codes and Viterbi decoding of the source, in the Xilinx ISE environment, use of Verilog prepared to help convolutional codes and Viterbi decoding of the study
Date : 2025-11-23 Size : 5.33mb User : lxz
chenxu Downloaded：0: 3-8 decoder input by 8 3 " and not" the door structure, use of VHDL language description, from the behavior and function of the 3-8 decoder is described, not only the logical design of the easy and convenient to
Date : 2025-11-23 Size : 9kb User : 小杰

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