VHDL-FPGA-Verilog List Page 229

VHDL-FPGA-Verilog list

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CANNY Downloaded：0: Canny edge detection for a particular picture. The first is the Gauss fuzzy, and then the Sobel operator is processed, and then the local maximum is determined, and finally the threshold is judged.
Date : 2025-05-24 Size : 7kb User : TonytheGreat
led_test Downloaded：0: Achieve water light control, Verilog procedures
Date : 2025-05-24 Size : 7.1mb User : win1234
mian Downloaded：0: After power on, the digital tube is low, five shows 00000, press the PLUSE button, display the value plus 1
Date : 2025-05-24 Size : 1kb User : 赵11
USB2.0的IP核（详细verilog源码和文档） Downloaded：0: USB2.0 IP kernel development. Code can be used directly, has been verified
Date : 2025-05-24 Size : 191kb User : kelvinlu
svpwm_full_nios Downloaded：1: Implementation of verilog svpwm for the development of the algorithm has a very good help. The I hope you learn a lot.
Date : 2025-05-24 Size : 14.13mb User : 头上两只角
08_lwip Downloaded：0: zynq7000 lwip program
Date : 2025-05-24 Size : 52.34mb User : shelihuang
seq Downloaded：0: Sequence detection function, novice programming
Date : 2025-05-24 Size : 2kb User : 橙鸽
DDS波形发生器 Downloaded：0: DDS generate verilog
Date : 2025-05-24 Size : 386kb User : jacktk@buaa.edu.cn
cordic Downloaded：0: Implementation cordic algorithm
Date : 2025-05-24 Size : 3kb User : chen_zc
Digital_clock Downloaded：0: Intelligent alarm clock based on FPGA, control N O K I A 5110
Date : 2025-05-24 Size : 622kb User : Terence Zhao
verilog_curr_design Downloaded：0: Table tennis game machine based on Verilog language, using the buttons to serve and catch..
Date : 2025-05-24 Size : 952kb User : 柴老师
实验二 DDS实验 Downloaded：0: FPGA PROCEDURE SHANDONG UNIVERSITY
Date : 2025-05-24 Size : 16.03mb User : mengxingdeyu

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