VHDL-FPGA-Verilog List Page 2186

VHDL-FPGA-Verilog list

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189d3e2cb54b Downloaded：0: Music generator, can play music Butterfly, contains all the parts of the program
Date : 2025-11-24 Size : 310kb User : 道
MYCLOCK Downloaded：0: VHDL language electronic clock source can be set with alarm clock
Date : 2025-11-24 Size : 2kb User : richard
eetop.cn_C8051 Downloaded：0: C8051 code for your reference, pay close attention needs to download it
Date : 2025-11-24 Size : 722kb User : lizixi
eetop.cn_spigpio Downloaded：0: GPIO and SPI basic core, please download the necessary, make recommendations
Date : 2025-11-24 Size : 2kb User : lizixi
eetop.cn_counter Downloaded：0: Counter-core design, just for reference, the design can be varied
Date : 2025-11-24 Size : 55kb User : 雷雅雯
digital-storage-oscilloscope Downloaded：0: The problem to design a digital storage oscilloscope, to Xilinx, Inc. 200,000 FPGA chip as the core, supplemented by the necessary peripherals (including signal conditioning, sample and hold, the internal trigger, A/D co
Date : 2025-11-24 Size : 14kb User : Jasen
fpga_example Downloaded：0: EDA technology and VHDL functional module design, click the drive, dds, frequency meter, etc.
Date : 2025-11-24 Size : 1.5mb User : Jasen
vhdl Downloaded：0: 16-bit processor code can be used to complete some simple experimental system on chip development
Date : 2025-11-24 Size : 26kb User :
biaojueqi Downloaded：0: A four-person voting, the main distinction between the identity of the referee and deputy referees, the referee more cattle X, he agreed on the adoption of
Date : 2025-11-24 Size : 114kb User : 张辛楠
Debunce Downloaded：0: VHDL bounce elimination circuit, it is necessary for the FPGA button
Date : 2025-11-24 Size : 1kb User : yrpk
LCD1602 Downloaded：0: LCD1602 control
Date : 2025-11-24 Size : 20kb User : zhagnwenlong
data_swith Downloaded：0: Verilog code and string conversion, delay
Date : 2025-11-24 Size : 2kb User : 张恒

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