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VHDL-FPGA-Verilog list
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FPGA libero circumstances described ProASIC3/E use of TWO Port RAM
Date : 2025-11-24 Size : 1.98mb User : ddm

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VHDL-based design and application of NC divider
Date : 2025-11-24 Size : 144kb User : moke

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PS/2 keyboard plus the verilog design DDS
Date : 2025-11-24 Size : 1.88mb User : 刘汉超

Based on EP2C8Q of, NIOS SD card reader, and TFT-LCD Control Example
Date : 2025-11-24 Size : 22.82mb User : moke

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Serial multi-machine communication, 8051 to do two, plus PROTEUS simulation
Date : 2025-11-24 Size : 55kb User : 许雄

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C51 source code written in dot matrix spectrum, absolutely original, with STC12C5A60S2, single complete signal acquisition, FFT operation, and dot-matrix screen of the drive, two-color dot matrix screen for the 12832. An
Date : 2025-11-24 Size : 36kb User : 郑德鑫

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TLC5618 driver, avr, fully functional, using the hardware spi interface. ,. .
Date : 2025-11-24 Size : 293kb User : 郑德鑫

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Articles on improving the FPGA, Verilog HDL language, and includes LCD control procedures and VHDL simulation, AD/DA, MASK, FSK, PSK, sine wave generator, and so the classic procedure
Date : 2025-11-24 Size : 1.13mb User : chenfeihu

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Two SCT80C52 communication between the microcontroller, a keyboard control LCD1602 display part in practice but also the success of the classic procedure
Date : 2025-11-24 Size : 3kb User : chenfeihu

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AD9215 with Verilog-driven development to achieve
Date : 2025-11-24 Size : 183kb User : 苏琪

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FPGA using 32-bit divider, there are the quotient and remainder
Date : 2025-11-24 Size : 1kb User : 余木

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LCD timer clock, a timer control on the time display in the lcd
Date : 2025-11-24 Size : 22kb User : 余木
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