VHDL-FPGA-Verilog List Page 2001

VHDL-FPGA-Verilog list

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jpeg_ashu.tar Downloaded：0: its is jpeg interface in vhdl
Date : 2025-09-19 Size : 3.26mb User : ashu
3_3matrix_mul Downloaded：0: it si a 3 3 matrix multiplication
Date : 2025-09-19 Size : 45kb User : ashu
ddr3_controller1 Downloaded：0: ddr3 controller for axi interface
Date : 2025-09-19 Size : 1kb User : ashu
top_interface Downloaded：0: top integrated block for 2d graphics engine
Date : 2025-09-19 Size : 1kb User : ashu
diivider4 Downloaded：0: Four divider, with a written calculation Fabu Zha, think the next on the next, no less will do
Date : 2025-09-19 Size : 1kb User : 刘哲
usb Downloaded：0: VHDL-based USB communication program, change the DATA input data transmission
Date : 2025-09-19 Size : 1kb User : Zhang
1 Downloaded：0: VHDL of rare books. Is essential when the electrical engineering books.
Date : 2025-09-19 Size : 23.79mb User : 张殇
digital_7 Downloaded：0: Verilog seven-segment LED display control program, the board has been tested in the experiment.
Date : 2025-09-19 Size : 435kb User : 吴平
odd_div Downloaded：1: Patients achieving the odd times using Verilog frequency, just to cite one example, but any odd frequency can be achieved with the principle.
Date : 2025-09-19 Size : 336kb User : 吴平
SDRAM_TEST Downloaded：0: SDRAM control code has been tested on the development board.
Date : 2025-09-19 Size : 17kb User : 吴平
sw_led Downloaded：0: Written in Verilog code using the DIP switches control led light display,
Date : 2025-09-19 Size : 1.57mb User : 吴平
uart_T01 Downloaded：0: Written in Verilog code, the serial port to send communications to achieve.
Date : 2025-09-19 Size : 914kb User : 吴平

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