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VHDL-FPGA-Verilog list
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zl30160_pll_config_interface_model
Downloaded:0
zl30160 pll configer interface
Date
: 2025-09-18
Size
: 25kb
User
:
yaofan
shiyan3lcd
Downloaded:0
Based on verilog, the LCD display Chinese characters,
Date
: 2025-09-18
Size
: 1kb
User
:
徐秀敏
SPI3_8bit
Downloaded:0
SPI3 verilog code(including ISE project and modelsim code)
Date
: 2025-09-18
Size
: 2.7mb
User
:
yaofan
pwm_1M
Downloaded:0
1MHz,16level PWM signal generation based on verilogHDL
Date
: 2025-09-18
Size
: 1kb
User
:
xiaodong
LCD-1
Downloaded:0
PIC LCD display control LCD12864
Date
: 2025-09-18
Size
: 3kb
User
:
余崇
Experiment01
Downloaded:0
Fpga entry Experiment 1: light led lights. verilog syntax
Date
: 2025-09-18
Size
: 489kb
User
:
口碑尹
led
Downloaded:0
this a usefull software.welcome to use!
Date
: 2025-09-18
Size
: 203kb
User
:
王军
cs
Downloaded:0
Counter with seven segment digital display design results decoder design,
Date
: 2025-09-18
Size
: 1kb
User
:
张金田
USB_Verilog_IP
Downloaded:0
USB IP core VHDL source
Date
: 2025-09-18
Size
: 140kb
User
:
xsp
EDA
Downloaded:0
EDA test source code, mainly for the addition and subtraction counter, decoder, encoder, etc.
Date
: 2025-09-18
Size
: 522kb
User
:
赵飞
ChipScope_Pro
Downloaded:0
XILINX FPGA software development is very good practical routine procedure
Date
: 2025-09-18
Size
: 14.79mb
User
:
FanXiaoyan
sheji
Downloaded:0
Baseband signal generator, can produce sine, ASK, PSK, FSK signal
Date
: 2025-09-18
Size
: 819kb
User
:
ruanxioafei
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