VHDL-FPGA-Verilog List Page 1874

VHDL-FPGA-Verilog list

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I2C Downloaded：0: I2C based on nios
Date : 2025-09-18 Size : 1kb User : 谭双平
SD_driver Downloaded：0: SD card based on nios
Date : 2025-09-18 Size : 3kb User : 谭双平
wirelessSend Downloaded：0: code of the wireless module of PTR6100 based on verilog
Date : 2025-09-18 Size : 2kb User : 谭双平
ReceiveCypress3 Downloaded：0: code of wireless module of PTR6100 based on verilog
Date : 2025-09-18 Size : 1kb User : 谭双平
myboothmul Downloaded：1: Three 16-bit integer arithmetic logic unit of the ALU design methodology, called library function 74181 (4 ALU), composed of serial 16-bit arithmetic logic unit. (With 74,181 positive logic) B. Call library functions 741
Date : 2025-09-18 Size : 173kb User : 王川
altera_inspector.log Downloaded：0: code using Quartus compiler cpu in alu design of curriculum design can be used as a reference for this for 16 computing device
Date : 2025-09-18 Size : 2.62mb User : 王川
jf Downloaded：0: Verilog modules prepared by the ALU4bit ALU (arithmetic logic unit) design is given in the design of alu input and output structure and the corresponding median. C0 which is a binary input of, A and B are four data entry
Date : 2025-09-18 Size : 1kb User : 王川
mult8 Downloaded：0: Eight of the adder, in quartus in through the compilation and can realize the function
Date : 2025-09-18 Size : 103kb User : 王川
key-lcd Downloaded：0: key
Date : 2025-09-18 Size : 57kb User : xiaoli
FADDER Downloaded：0: This a vhdl of udcnt4
Date : 2025-09-18 Size : 272kb User : humingli
I2C_master Downloaded：0: Imitation of the design ideas in order to use I2C-Master modules, easy to understand, the use of the power module CMOS chips GC0307 when the register initialization
Date : 2025-09-18 Size : 3kb User : woxx
traffic Downloaded：0: failed to translate
Date : 2025-09-18 Size : 542kb User : jack

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