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VHDL-FPGA-Verilog list
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A22_NIOS_RS232
Downloaded:0
Based on the EP2C8Q208C8 development board ALTERA company of serial transmission and reception function, inside the board test program in success, I hope it can help you ha......
Date
: 2025-09-17
Size
: 7.53mb
User
:
linqinghui
AllegroV16_wn_GB
Downloaded:0
velog for I2C and 16c450
Date
: 2025-09-17
Size
: 1.3mb
User
:
wqeen
adder4
Downloaded:0
adders for 8241BCD
Date
: 2025-09-17
Size
: 306kb
User
:
Doria
miaobiao
Downloaded:0
Verilog VHDL with the description of a stopwatch program, can display the arc, seconds and points.
Date
: 2025-09-17
Size
: 372kb
User
:
彭全飞
VHDL-node
Downloaded:0
Some experiments of VHDL code, which has four reversible counters, four reversible binary code- Gray code converter design, sequence detection Design, ROM-based sine wave generator design, digital design and implementati
Date
: 2025-09-17
Size
: 48kb
User
:
张联合
jiaotongdeng-
Downloaded:0
Ordinary traffic lights, can set the initial countdown time, using matrix keyboard Settings. Connotation principle diagram. Please use proteus 7.7 or higher version open
Date
: 2025-09-17
Size
: 21kb
User
:
彭全飞
123
Downloaded:0
Single-chip frequency counter
Date
: 2025-09-17
Size
: 1kb
User
:
姜宇凡
EDA
Downloaded:0
EDA tutorials and practical techniques, VHDL-based eight-digit full adder
Date
: 2025-09-17
Size
: 614kb
User
:
邓亚军
honglvdeng
Downloaded:0
Based on LPC2114 intersection traffic lights to realize the simulation control
Date
: 2025-09-17
Size
: 1kb
User
:
苏影
MY
Downloaded:0
Stepper motor driver, using a unipolar drive circuit is simple, more convenient
Date
: 2025-09-17
Size
: 127kb
User
:
沈杰
pspice
Downloaded:0
for learn
Date
: 2025-09-17
Size
: 814kb
User
:
yuhongxu
shuzishizhong
Downloaded:0
Digital clock, including flowcharts, and coding and a full lab report, detailed and rich.
Date
: 2025-09-17
Size
: 763kb
User
:
邵麟淞
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