VHDL-FPGA-Verilog List Page 1838

VHDL-FPGA-Verilog list

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Behavioral-Modeling Downloaded：0: A Code that illustrates 12 bit switch, 2x1 Mux, 2x4 Decoder in behavioral modeling in Verilog HDL using modelsim IDE
Date : 2025-09-17 Size : 1kb User : Asad Abbas
ADD_lab_manual_2K8 Downloaded：0: This Advance Digital Design Manual, that is taught in our University, it takes from the basic to the advance in Verilog Programming using Modelsim IDE, very good for self learning
Date : 2025-09-17 Size : 607kb User : Asad Abbas
fre3 Downloaded：0: FPGA-based direct digital frequency synthesizer to generate a square wave, triangle wave and sine wave, frequency range of 1 ~ 20000HZ
Date : 2025-09-17 Size : 1.52mb User : 张良哲
da Downloaded：0: Single-chip display program that can receive information from the DDS, the LCD display shows the current output waveform and frequency
Date : 2025-09-17 Size : 18kb User : 张良哲
R19UH0044EJ0500_LCD Downloaded：0: Renesas EMMA EV2 LCD
Date : 2025-09-17 Size : 2.09mb User : ffumi68
R19UH0063EJ0300_PWM Downloaded：0: Renesas EMMA EV2 PWM
Date : 2025-09-17 Size : 736kb User : ffumi68
spimaster Downloaded：0: -- Description : This core implements a SPI master interface. -- Transfer size is 4, 8, 12 or 16 bits. -- The SPI clock is 0 when idle, sampled on -- the rising edge of the SPI clock. -- The SPI clock is derived from the
Date : 2025-09-17 Size : 3kb User : mrmager
decod4_16_with_decod3_8 Downloaded：0: 4to16 decoder with 3to8 decoder verilog code
Date : 2025-09-17 Size : 3kb User : b
haming-code Downloaded：0: 4to16 decoder with 3to8 decoder verilog code
Date : 2025-09-17 Size : 1kb User : b
1s_delay_1205 Downloaded：0: PD PWM pulse output port can be used oscilloscope or plus an LED light, you can see the LED pulse width changes
Date : 2025-09-17 Size : 1kb User : 陈华
xinhaofashengqi Downloaded：0: Electronic Measurement Signal Generator on some basic information, very useful
Date : 2025-09-17 Size : 1.32mb User : 杨晓博
DE2_115_Audio Downloaded：0: NIOS2 Audio
Date : 2025-09-17 Size : 1.83mb User : 郭祥

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