VHDL-FPGA-Verilog List Page 1743

VHDL-FPGA-Verilog list

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xiyijixiansi Downloaded：0: Washing machine control model, the design of the main LCD display program in the washing machine control circuit, including procedures and simulation in Figure
Date : 2025-09-16 Size : 47kb User : 郑海
3P3_wimdow Downloaded：0: 3*3 window
Date : 2025-09-16 Size : 3kb User : 杨开峰
CCD-circuit-of-FPGA-based-design Downloaded：0: CCD driving circuit of the FPGA-based design
Date : 2025-09-16 Size : 572kb User : liuhaiying
CCD Downloaded：0: Optical solid-state image sensor are gathered together by the photosensitive element array and charge-transfer device
Date : 2025-09-16 Size : 105kb User : liuhaiying
dds1 Downloaded：0: ALTERA company fpga chip, programming languages, Verilog HDL, to achieve the DDS digital signal generator, can generate sine signal, triangle signal, rectangular signal
Date : 2025-09-16 Size : 1.5mb User : 郭晨
CC2530-UART2TEST Downloaded：0: RECEIVE AND TRANSIT
Date : 2025-09-16 Size : 19kb User : 李辉
1602_CLOCK Downloaded：0: FPGA,1602 ,clock
Date : 2025-09-16 Size : 2.23mb User : 朱浩
AD_1 Downloaded：0: FPGA AD verilog
Date : 2025-09-16 Size : 1.02mb User : 朱浩
8x8led Downloaded：1: FPGA 8X8点阵，verilog
Date : 2025-09-16 Size : 483kb User : 朱浩
clock Downloaded：0: FPGA implementation of the electronic clock code, year, month, day, hours, minutes, seconds, chronograph, and the whole hour, you can manually set the time
Date : 2025-09-16 Size : 154kb User : 袁敏杰
wb_conbus_latest.tar Downloaded：0: VHDL，verilog is very good
Date : 2025-09-16 Size : 27kb User : 赵谦
DDPP Downloaded：0: Digital Design Principles and Practices
Date : 2025-09-16 Size : 4.41mb User :

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