VHDL-FPGA-Verilog List Page 1679

VHDL-FPGA-Verilog list

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USB-PLUS-LCD Downloaded：0: USB LCD,use it to write to lcd
Date : 2025-09-15 Size : 185kb User : KONAMI
Lab3 Downloaded：0: This is stopwatch writen in Verilog HDL. Also there is code for 7-segment display decoder. I tested it on ALTERA de2-115 development and education board.
Date : 2025-09-15 Size : 8.32mb User : haramandic
bijiaoqi Downloaded：0: verilog 9位数 3乘3 窗口比较器
Date : 2025-09-15 Size : 1.16mb User : 左振鹏
decode3to8 Downloaded：0: Simple 3-8 decoder, Verilog language
Date : 2025-09-15 Size : 1.27mb User : 李彦超
fenpin Downloaded：0: A simple divider, clock divider, can modify the parameters to achieve different divider
Date : 2025-09-15 Size : 1.33mb User : 李彦超
FPGA Downloaded：0: Personally think it is a very practical FPGA Tutorial, very suitable for beginners to learn
Date : 2025-09-15 Size : 578kb User : 李彦超
fangbo Downloaded：0: A switchable clock divider divider verilog language, modify the parameters according to the specific circumstances of different sub-frequency
Date : 2025-09-15 Size : 1.25mb User : 李彦超
FPGA Downloaded：0: xilinx培训教程以及ISE使用教程 ISE是一个很好的FPGA开发软件
Date : 2025-09-15 Size : 5.72mb User : 孙丽国
can2rs232 Downloaded：0: can to ttl and rs232 codes
Date : 2025-09-15 Size : 229kb User : 肖鹏辉
jiafa Downloaded：0: Based on the words of the QUTER VHDL adder design
Date : 2025-09-15 Size : 126kb User : shenlina
SR Downloaded：0: Based on the QUTER ST device VHDL language design!
Date : 2025-09-15 Size : 94kb User : shenlina
shiyan2a Downloaded：0: The computer network consisting of the experiment QUTER VHDL program group row!
Date : 2025-09-15 Size : 434kb User : shenlina

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