VHDL-FPGA-Verilog List Page 1496

VHDL-FPGA-Verilog list

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03-NEC_2003_C Downloaded：0: Phase shift generator Problem C (2003), Verilog source code,
Date : 2025-09-12 Size : 322kb User : 艾米丽
04-NEC_2003_C Downloaded：0: digital phase meter Problem C (2003), Verilog source code
Date : 2025-09-12 Size : 1.96mb User : 艾米丽
05-NEC_2003_D Downloaded：0: Simple logic analyzer (, 2003 D), Verilog source code
Date : 2025-09-12 Size : 408kb User : 艾米丽
06-NEC_2005_A Downloaded：0: 06- sinusoidal signal generator (2005 A question), Verilog source code
Date : 2025-09-12 Size : 707kb User : 艾米丽
alarm Downloaded：0: The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
Date : 2025-09-12 Size : 99kb User : jayjay
comp Downloaded：0: The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
Date : 2025-09-12 Size : 112kb User : jayjay
8.3-LCD Downloaded：0: FPGA to drive the LCD display Chinese characters procedures and the use of the state machine
Date : 2025-09-12 Size : 5kb User : 林高办
curtain Downloaded：0: The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
Date : 2025-09-12 Size : 112kb User : jayjay
lighting Downloaded：0: The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
Date : 2025-09-12 Size : 89kb User : jayjay
modulated_gen Downloaded：0: The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.
Date : 2025-09-12 Size : 183kb User : jayjay
RD1055_rev01.3 Downloaded：0: NAND Flash Controller Reference Design RD10
Date : 2025-09-12 Size : 584kb User : akjfklaskdfj
NAND_Flash_Interface_DF Downloaded：0: actel NAND Flash Interface Design Example
Date : 2025-09-12 Size : 2.48mb User : akjfklaskdfj

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