VHDL-FPGA-Verilog List Page 1450

VHDL-FPGA-Verilog list

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plot_f1 Downloaded：0: The function of this program after the completion of the Quartus II software simulation, export tbl file matlab drawing, draw a diagram of the time domain and frequency domain diagram. Pending the tbl file, I handled man
Date : 2025-09-11 Size : 1kb User : liu hao
Final_Vinod Downloaded：0: AES algorithm with 64 bits
Date : 2025-09-11 Size : 620kb User : Haramardeep
Attachments_2012_06_28 Downloaded：0: A2d converter in VLSI
Date : 2025-09-11 Size : 351kb User : Haramardeep
counter Downloaded：0: A triangular wave generator is suitable for PWM use
Date : 2025-09-11 Size : 1kb User : TOM KJ
Atlys_AC97_EDK_demo Downloaded：0: vhld code for audio codec
Date : 2025-09-11 Size : 403kb User : gopal
chipscope-pro-software-overview Downloaded：0: chipscope.......demo note
Date : 2025-09-11 Size : 13mb User : gopal
Atlys_ISE_GPIO_UART(1) Downloaded：0: atlys gpio yuart program
Date : 2025-09-11 Size : 92kb User : gopal
ch3ex Downloaded：0: chpater 3 of basic embedded desiign
Date : 2025-09-11 Size : 6kb User : gopal
pingpong Downloaded：0: pingpong Game (1player,2user(left user,right user) It s operated to display on Monitor to use Graphic Digit Font. ps) not working score digit and 2 players
Date : 2025-09-11 Size : 5kb User : 龍龍
FPGA_VHDL_ Downloaded：0: four wave of function generation
Date : 2025-09-11 Size : 2.05mb User : hui
DC-motor-control-implementation Downloaded：0: DC motor control to achieve open, speed, duty cycle display
Date : 2025-09-11 Size : 8kb User : Morina
Brick0 Downloaded：0: Brick Game (VHDL) When square ball meets Bricks, brick will disappear and ball go on or reflects on some conditions,Scores be up. Just Test source Code, 4 Brick on Monitors. Have Good Luck.
Date : 2025-09-11 Size : 4kb User : 龍龍

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