VHDL-FPGA-Verilog List Page 145

VHDL-FPGA-Verilog list

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vote Downloaded：0: Design a 100 person voter, more than 70 people passed, using Verilog language design
Date : 2025-05-19 Size : 16.37mb User : vsslms
mul8 Downloaded：0: A multiplier of two 8 bit binary numbers is designed with Verilog
Date : 2025-05-19 Size : 16.38mb User : vsslms
clock Downloaded：0: A digital clock is designed with Verilog language, and it can run successfully on board
Date : 2025-05-19 Size : 6.82mb User : vsslms
jishi Downloaded：0: A calendar is designed with Verilog language, including leap year judgment, simulation is correct
Date : 2025-05-19 Size : 31.04mb User : vsslms
fenpin Downloaded：0: A frequency divider is designed in Verilog language. The frequency of crystal oscillator is 50MHz
Date : 2025-05-19 Size : 4.05mb User : vsslms
fifo Downloaded：0: fifo in qurtuas using verilog
Date : 2025-05-19 Size : 10kb User : taewoo
vga256display Downloaded：0: vga 256 colors dispaly module
Date : 2025-05-19 Size : 613kb User : 鱼子
04_led_test Downloaded：0: run led FPGA code , based on S6 of xilinx
Date : 2025-05-19 Size : 1.28mb User : 声声不洗
05_key_test Downloaded：0: Button using FPGA code control, including jitter and so on;
Date : 2025-05-19 Size : 176kb User : 声声不洗
06_pll_test Downloaded：0: The use of PLL IP core, including detailed configuration, suitable for learning to use;
Date : 2025-05-19 Size : 227kb User : 声声不洗
07_uart_test Downloaded：0: UART communication protocol Verilog encoding implementation, as well as a complete test file.
Date : 2025-05-19 Size : 351kb User : 声声不洗
10_rom_test Downloaded：0: ROM IP core configuration, as well as test files, suitable for beginners to use.
Date : 2025-05-19 Size : 4.04mb User : 声声不洗

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