VHDL-FPGA-Verilog List Page 1441

VHDL-FPGA-Verilog list

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fengpingPfifo Downloaded：0: 8 AD chip sampling rate based on DE0 platform different clock collection and send. FIFO module.
Date : 2025-09-11 Size : 2.12mb User : 吴爱东
SHT1X Downloaded：0: The SHT source, and share, I hope you learn something
Date : 2025-09-11 Size : 8.24mb User : xuge
LM32_ZTEX_Spartan6 Downloaded：0: LatticeMico32 soft processor porting to ZTEX (Spartan6) board
Date : 2025-09-11 Size : 11.91mb User : d4rkin9
udp_ip__core_latest.tar Downloaded：0: UDP IP core with source code
Date : 2025-09-11 Size : 177kb User : d4rkin9
OpenRISC-GRAPHIC-ACCELERATOR.tar Downloaded：0: OpenRISC GRAPHIC ACCELERATOR, wonderfull efects
Date : 2025-09-11 Size : 2mb User : d4rkin9
led Downloaded：0: To light EP2C5Q208C8N the LED light water, and water light effect
Date : 2025-09-11 Size : 355kb User : yunyifeng
clk_div Downloaded：0: Universal asynchronous receiver/transmitter device. Microprocessor and external Micro Devices serial communication
Date : 2025-09-11 Size : 1kb User : 田彦林
MC8051-Kernel Downloaded：0: 8051 core, and the use of the VHDL language (including instructions)
Date : 2025-09-11 Size : 269kb User : 刘维东
DE2_video_decode Downloaded：0: Based on the Altera DE2 board video decoder (verilogHDL)
Date : 2025-09-11 Size : 284kb User : 梦飞
DE2_NETWORK Downloaded：0: Altera Corporation DE2-based network development process (verilogHDL)
Date : 2025-09-11 Size : 1.75mb User : 梦飞
DE2_SD_Card_Audio Downloaded：0: ALTERA DE2 board, card reader drive and audio processing (verilog)
Date : 2025-09-11 Size : 1.71mb User : 梦飞
DE2_SOPC_Builder Downloaded：0: Based on the DE2 board of SOPC (verilogHDL)
Date : 2025-09-11 Size : 2.22mb User : 梦飞

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