VHDL-FPGA-Verilog List Page 1413

VHDL-FPGA-Verilog list

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1 Downloaded：0: Based on VHDL-1602 driver, prepared by the state machine
Date : 2025-09-10 Size : 13kb User : 郑志超
DACtest Downloaded：0: Spartan 3E - DAC- VHDL. It is a vhdl code for Xilinx Spartan 3E fpga to run ADC and AMP on the board via SPI interface.
Date : 2025-09-10 Size : 154kb User : psycho374
comparer Downloaded：0: VHDL comparator can be used directly QuatusII the project file open
Date : 2025-09-10 Size : 46kb User : lb
VHDLbasic_cal Downloaded：0: VHDL add, subtract, multiply, compare the source code of the basic operations
Date : 2025-09-10 Size : 41kb User : lb
135-examples--for-verilog Downloaded：0: 135 examples for verilog
Date : 2025-09-10 Size : 111kb User : 杨静
ste_svpwm Downloaded：1: Practical Verilog of SVPWM written procedures, resulting in the SVPWM waveform can be used to implement the space vector control algorithm of the synchronous motor or induction motor.
Date : 2025-09-10 Size : 3.18mb User : zhouming
frequency Downloaded：0: Precision frequency meter (FPGA part) by the single-chip transmit frequency control word to the FPGA, FPGA, to achieve the count, and then finally sent to the digital data processing tube or LCD display test frequency co
Date : 2025-09-10 Size : 441kb User : 逸风
DDC_VHDL Downloaded：0: DDS signal generator can generate a square wave, and some small modifications to the next input data to generate arbitrary waveforms.
Date : 2025-09-10 Size : 430kb User : 逸风
ipI2C Downloaded：0: Design and verification of IP cores, using I2C communication between the FPGA and the FPGA. .
Date : 2025-09-10 Size : 1.05mb User : 逸风
div_clk_encoder Downloaded：0: System when any even divide, as long as the modified several locations can be easily ported.
Date : 2025-09-10 Size : 1kb User : 逸风
FIFO Downloaded：2: FIFO is the abbreviation of the English First In First Out, a FIFO data buffer, the difference between ordinary memory is no external read and write address lines, so very simple to use, but the drawback is that the only
Date : 2025-09-10 Size : 343kb User : 李海军
9b93752447d7 Downloaded：0: USB drive write verilog. For in the SOPC IP CORE
Date : 2025-09-10 Size : 19kb User : wang

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