Design and verification of IP cores, using I2C communication between the FPGA and the FPGA. .

ipI2C\I2C Controller Reference Design.doc
.....\license.txt
.....\qii\cmp_state.ini
.....\...\db\cntr_4q7.tdf
.....\...\..\cntr_pd8.tdf
.....\...\..\cntr_re8.tdf
.....\...\..\i2c.db_info
.....\...\..\i2c.eco.cdb
.....\...\..\i2c.sld_design_entry.sci
.....\...\..\i2c_cmp.qrpt
.....\...\..\i2c_hier_info
.....\...\..\i2c_sim.qrpt
.....\...\..\i2c_syn_hier_info
.....\...\..\prev_cmp_i2c.asm.qmsg
.....\...\..\prev_cmp_i2c.eda.qmsg
.....\...\..\prev_cmp_i2c.fit.qmsg
.....\...\..\prev_cmp_i2c.map.qmsg
.....\...\..\prev_cmp_i2c.tan.qmsg
.....\...\i2c.asm.rpt
.....\...\i2c.done
.....\...\i2c.eda.rpt
.....\...\i2c.fit.eqn
.....\...\i2c.fit.rpt
.....\...\i2c.fit.summary
.....\...\i2c.flow.rpt
.....\...\i2c.map.eqn
.....\...\i2c.map.rpt
.....\...\i2c.map.summary
.....\...\i2c.pin
.....\...\i2c.pof
.....\...\i2c.qpf
.....\...\i2c.qsf
.....\...\i2c.qws
.....\...\i2c.sof
.....\...\i2c.tan.rpt
.....\...\i2c.tan.summary
.....\...\i2c_assignment_defaults.qdf
.....\...\quartus_nativelink_simulation.log
.....\...\simulation\modelsim\i2c.vo
.....\...\..........\........\i2c_modelsim.xrf
.....\...\..........\........\i2c_v.sdo
.....\...\..........\........\modelsim.ini
.....\...\..........\........\........_work\0modelsim_work.mgf
.....\...\..........\........\.............\1modelsim_work.mgf
.....\...\..........\........\.............\3modelsim_work.mgf
.....\...\..........\........\.............\4modelsim_work.mgf
.....\...\..........\........\.............\modelsim_work.lib
.....\...\..........\........\.............\vcp.epr
.....\...\..........\........\.............\vcp_cmd.log
.....\...\..........\........\vsimsa.cfg
.....\...\..........\vcs\i2c.vo
.....\...\..........\...\i2c_v.sdo
.....\read_me.doc
.....\read_me.txt
.....\soc\i2c.vhd
.....\...\i2c.vhd.bak
.....\...\i2c_control.vhd
.....\...\shift.vhd
.....\...\uc_interface.vhd
.....\...\upcnt4.vhd
.....\testbench\micro_master_tb.vhd
.....\.........\micro_slave_tb.vhd
.....\.........\micro_tb.vhd
.....\.........\micro_test.do
.....\.........\micro_test.vhd
.....\.........\micro_test_post.do
.....\.........\micro_test_post.vhd
.....\.........\pullup.vhd
.....\.........\upcnt4_tb.vhd
.....\.........\upcnt4_tb_post.vhd
.....\.........\wave.do
.....\.........\wave_post.do
.....\work\i2c\behave.dat
.....\....\...\behave.psm
.....\....\...\structure.dat
.....\....\...\structure.psm
.....\....\...\_primary.dat
.....\....\..._control\behave.dat
.....\....\...........\behave.psm
.....\....\...........\_primary.dat
.....\....\micro_master_tb\rtl.dat
.....\....\...............\rtl.psm
.....\....\...............\_primary.dat
.....\....\......slave_tb\rtl.dat
.....\....\..............\rtl.psm
.....\....\..............\_primary.dat
.....\....\......tb\rtl.dat
.....\....\........\rtl.psm
.....\....\........\_primary.dat
.....\....\.......est\archmicro_test.dat
.....\....\..........\archmicro_test.psm
.....\....\..........\_primary.dat
.....\....\.........._post\archmicro_test_post.dat
.....\....\...............\archmicro_test_post.psm
.....\....\...............\_primary.dat
.....\....\pullup\archpullup.dat
.....\....\......\archpullup.psm
.....\....\......\_primary.dat
.....\....\roc\roc_v.dat
.....\....\...\roc_v.psm

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